MG84FL54BD MEGAWIN [Megawin Technology Co., Ltd], MG84FL54BD Datasheet - Page 80

• Manufacturer Part Number: MG84FL54BD
• Description: Full-Speed USB micro-controller
• Manufacturer: MEGAWIN [Megawin Technology Co., Ltd]

22. System Clock
22.1. Programmable System Clock
The system clock (or CPU clock) of the device is programmable and source-selectable. The user can program
the system clock frequency by bits CKS2~CKS0 (CKCON.2 ~ CKCON.0) and select the clock source by bit
CK_SEL (CKCON2.0). The block diagram of system clock is shown below.
Block Diagram of System Clock
Note: In the Power down mode, the XTAL oscillating circuit will stop.
CKCON (Address=C7H, Clock Control Register)
XCKS4~XCKS0 (or XCKS[4:0]): Filled with a proper value according to OSCin, as listed below.
[XCKS4~XCKS0] = OSCin – 1, where OSCin=1~32 (MHz).
For examples,
(1) If OSCin=12MHz, then fill [XCKS4~XCKS0] with 11, i.e., 01011B.
(2) If OSCin=6MHz, then fill [XCKS4~XCKS0] with 5, i.e., 00101B.
CKS2~CKS0: System clock divider select bits, as follows.
CKS2 CKS1 CKS0
80
XCKS4
0
0
0
0
1
1
1
1
7
0
0
1
1
0
0
1
1
XCKS3
0
1
0
1
0
1
0
1
6
PLL_CV
XTAL1
XTAL2
XCKS2
Fosc (System Clock)
Oscillating
5
Circuit
CLKin
CLKin /2
CLKin /4
CLKin /8
CLKin /16
CLKin /32
CLKin /64
CLKin /128
EN_PLL
XCKS1
MG84FL54B Data Sheet
default
4
XCKS[4:0]
PLL
XCKS0
3
CKS2
CK_SEL
48MHz
2
CKS1
CKS[2:0]
1
To USB Logic
CKS0
0
System Clock
MEGAWIN