SC16C750B Philips Semiconductors, SC16C750B Datasheet - Page 21

• Manufacturer Part Number: SC16C750B
• Description: 5 V/ 3.3 V and 2.5 V UART with 64-byte FIFOs
• Manufacturer: Philips Semiconductors

Philips Semiconductors
9397 750 14453
Product data
7.4 Interrupt Status Register (ISR)
The SC16C750B provides four levels of prioritized interrupts to minimize external
software interaction. The Interrupt Status Register (ISR) provides the user with four
interrupt status bits. Performing a read cycle on the ISR will provide the user with the
highest pending interrupt level to be serviced. No other interrupts are acknowledged
until the pending interrupt is serviced. Whenever the interrupt status register is read,
the interrupt status is cleared. However, it should be noted that only the current
pending interrupt is cleared by the read. A lower level interrupt may be seen after
re-reading the interrupt status bits.
(bits 0-4) for the four prioritized interrupt levels and the interrupt sources associated
with each of these interrupt levels.
Table 12:
Table 13:
Priority
level
1
2
2
3
4
Bit
7:6
5
4
3:1
0
Interrupt source
Interrupt Status Register bits description
ISR[3]
0
0
1
0
0
Symbol
ISR[7:6]
ISR[5]
ISR[4]
ISR[3:1]
ISR[0]
Rev. 03 — 13 December 2004
ISR[2]
1
1
1
0
0
Description
FIFOs enabled. These bits are set to a logic 0 when the FIFO is
not being used. They are set to a logic 1 when the FIFOs are
enabled.
64-byte FIFO enable.
Not used.
INT priority bits 2-0. These bits indicate the source for a pending
interrupt at interrupt priority levels 1, 2, and 3 (see
INT status.
Logic 0 or cleared = default condition.
Logic 0 = 16-byte operation.
Logic 1 = 64-byte operation.
Logic 0 or cleared = default condition.
Logic 0 = An interrupt is pending and the ISR contents may be
used as a pointer to the appropriate interrupt service routine.
Logic 1 = No interrupt pending (normal default condition).
ISR[1]
1
0
0
1
0
Table 12 “Interrupt source”
5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs
ISR[0]
0
0
0
0
0
Source of the interrupt
LSR (Receiver Line Status Register)
RXRDY (Received Data Ready)
RXRDY (Receive Data time-out)
TXRDY (Transmitter Holding Register
Empty)
MSR (Modem Status Register)
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
SC16C750B
shows the data values
Table
12).
21 of 44