ADV7177 Analog Devices, ADV7177 Datasheet - Page 14

no-image

ADV7177

Manufacturer Part Number
ADV7177
Description
Integrated Digital CCIR-601 to PAL/NTSC Video Encoder
Manufacturer
Analog Devices
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7177KS
Manufacturer:
AD
Quantity:
5 510
Part Number:
ADV7177KS
Manufacturer:
OMRON
Quantity:
5 510
Part Number:
ADV7177KS
Manufacturer:
ADI
Quantity:
210
Part Number:
ADV7177KSZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADV7177KSZ
Manufacturer:
AD
Quantity:
1 000
Part Number:
ADV7177KSZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
ADV7177KSZ-REEL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADV7177KSZ-REEL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADV7177/ADV7178
Vertical Blanking Data Insertion
It is possible to allow encoding of incoming YCbCr data on those lines of VBI that do not bear line sync or pre-/post-equalization
pulses (see Figures 14 to 25). This mode of operation is called “Partial Blanking” and is selected by setting MR31 to 1. It allows the
insertion of any VBI data (Opened VBI) into the encoded output waveform. This data is present in digitized incoming YCbCr data
stream (e.g., WSS data, CGMS, VPS, etc.). Alternatively, the entire VBI may be blanked (no VBI data inserted) on these lines by
setting MR31 to 0.
The complete VBI comprises of the following lines:
525/60 Systems, Lines 525 to 21 for Field 1 and Lines 262 to Line 284 for Field 2.
625/50 Systems, Lines 624 to Line 22 and Lines 311 to 335.
The “Opened VBI” consists of:
525/60 Systems, Lines 10 to 21 for Field 1 and second half of Line 273 to Line 284 for Field 2.
625/50 Systems, Line 7 to Line 22 and Lines 319 to 335.
Mode 0 (CCIR-656): Slave Option
(Timing Register 0 TR0 = X X X X X 0 0 0)
The ADV7177/ADV7178 is controlled by the SAV (Start Active Video) and EAV (End Active Video) time codes in the pixel data.
All timing information is transmitted using a 4-byte synchronization pattern. A synchronization pattern is sent immediately before
and after each line during active picture and retrace. Mode 0 is illustrated in Figure 14. The HSYNC, FIELD/VSYNC and BLANK
(if not used) pins should be tied high during this mode.
Mode 0 (CCIR-656): Master Option
(Timing Register 0 TR0 = X X X X X 0 0 1)
The ADV7177/ADV7178 generates H, V and F signals required for the SAV (Start Active Video) and EAV (End Active Video) time
codes in the CCIR-656 standard. The H bit is output on the HSYNC pin, the V bit is output on the BLANK pin, and the F bit is
output on the FIELD/VSYNC pin. Mode 0 is illustrated in Figure 15 (NTSC) and Figure 16 (PAL). The H, V and F transitions
relative to the video waveform are illustrated in Figure 17.
NTSC/PAL M SYSTEM
(525 LlNES/60Hz)
(625 LINES/50Hz)
INPUT PIXELS
PAL SYSTEM
ANALOG
VIDEO
Y
END OF ACTIVE
VIDEO LINE
C
r
Y
Figure 14. Timing Mode 0 (Slave Mode)
F
F
4 CLOCK
EAV CODE
4 CLOCK
0
0
0
0
X
Y
8
0
1
0
8
0
1
0
–14–
ANCILLARY DATA
0
0
268 CLOCK
280 CLOCK
F
F
(HANC)
F
F
A
B
A
B
A
B
8
0
1
0
8
0
1
0
SAV CODE
4 CLOCK
F
F
4 CLOCK
START OF ACTIVE
0
0
VIDEO LINE
0
0
X
Y
C
b
Y C
1440 CLOCK
1440 CLOCK
r
Y
C
b
Y
C
r
Y
C
b
REV. 0

Related parts for ADV7177