ADV7191 Analog Devices, ADV7191 Datasheet - Page 43

• Manufacturer Part Number: ADV7191
• Description: Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs
• Manufacturer: Analog Devices

BRIGHTNESS DETECT REGISTER
(Address (SR5–SR0) = 34H)
T
to read back data in order to monitor the brightness/darkness of
the incoming video data on a field-by-field basis. The brightness
information is read from the I
the color controls or the gamma correction controls may be
adjusted.
The luma data is monitored in the active video area only. The
average brightness I
every VSYNC signal.
O
(Address (SR4–SR0) = 35H)
T
shows the various operations under the control of this register.
he Brightness Detect Register is an 8-bit-wide register used only
he Output Clock Register is a 8-bit-wide register. Figure 87
UTPUT CLOCK REGISTER (OCR 9–0)
2
C register is updated on the falling edge of
ZERO MUST BE
WRITTEN TO
THIS BIT
2
OCR07
OCR07
C and based on this information,
OCR06
OCR06 – OCR04
ONE MUST BE
WRITTEN TO
THESE BITS
OCR05
OCR04
O
Reserved (OCR00)
A Logic 0 must be written to this bit.
CLKOUT Pin Control (OCR01)
This bit enables the CLKOUT pin when set to 1 and, therefore,
outputs a 54 MHz clock generated by the internal PLL. The
PLL and 4× Oversampling have to be enabled for this control to
take effect, (MR61 = 0; MR16 = 1).
Reserved (OCR02–03)
A Logic 0 must be written to these bits.
Reserved (OCR04–06)
A Logic 1 must be written to these bits.
Reserved (OCR07)
A Logic 0 must be written to this bit.
OCR03
ZERO MUST BE
CR BIT DESCRIPTION
OCR03 – OCR02
WRITTEN TO
THESE BITS
OCR02
OCR01
0
1
PIN CONTROL
CLKOUT
OCR01
ENSABLED
DISABLED
ZERO MUST BE
WRITTEN TO
THIS BIT
OCR00
OCR00
ADV7190/ADV7191