SAA7390GP Philips Semiconductors, SAA7390GP Datasheet - Page 38

• Manufacturer Part Number: SAA7390GP
• Description: High performance Compact Disc-Recordable CD-R controller
• Manufacturer: Philips Semiconductors

Philips Semiconductors
The transfer block is specified by registers HOSTOFFS
and HOSTOFFE. For each frame, the transfer will start at
the address specified by HOSTOFFS and continue until
the address specified by HOSTOFFE is transferred.
After each block is transferred, the frame address
HOSTCFRM will be incremented and the transfer will
continue with the same address block from the next frame.
If OFF_ADR is set, then two blocks of data are transferred.
In the two offset mode, both HOSTOFFS and HOSTOFFE
are used to access two independent register pairs; for
simplicity, these are called the A registers and the B
registers. In this event, the transfer for each frame is a two
step process.
First, the offset block specified by HOSTOFFS-A and
HOSTOFFE-A is transferred; the transfer address range is
from HOSTOFFS-A to HOSTOFFE-A and includes both
the start and end addresses. After the first offset block is
transferred, the second offset block as specified by
HOSTOFFS-B and HOSTOFFE-B is transferred.
The frame address will not be incremented until after both
offset blocks are transferred. Once both offset blocks are
transferred, the frame address is incremented and again
the two offset blocks are transferred for the next frame.
Reading and writing of the A and the B registers is
controlled by an automatic switching after the most
significant bytes of the registers are written.
After power-up or reset the pointer to the A registers will be
selected. If the dual offset mode is selected, the A/B switch
will be toggled when the most significant bytes of the
registers are written; either the most significant bytes of
Table 52 Host interface offset counter: 0xF09C, F09D; note 1
Note
1. These addresses access the actual counter of the host interface offset counter and therefore rapidly change during
1996 Jul 02
MNEMONIC
If two offset pairs are used, the A start offset must be written last to ensure that the correct offset start address is loaded
into the counter.
In the two offset mode, reading the register after loading is not possible due to the automatic switching feature; if the
A offset pair is written, and the register pair is read, the B offset pair would be read.
High performance Compact
Disc-Recordable (CD-R) controller
host interface transfers.
HOFF
HOFF
R/W
R/W
R/W
7
6
5
38
OFFSET7 to OFFSET0
HOSTOFFS or HOSTOFFE. Any future reads or writes will
access the B registers.
The process of loading and reading the two host offset
address pairs can be monitored and controlled by
OFF_STR and OFF_END from HOSTMOD. Reading
OFF_STR shows the status of the A/B switch for the
HOSTOFFS-A/B registers; reading OFF_END shows the
status of the A/B switch for the HOSTOFFE-A/B registers.
A write to HOSTMOD with OFF_STR LOW will clear the
A/B switch for the HOSTOFFS registers; a write to
HOSTMOD with OFF_END LOW will clear the A/B switch
for the HOSTOFFE registers.
HOSTSFRM is used to determine the starting frame
address for all host operations. The associated counter is
automatically incremented after each frame, and wraps
back onto HOSTSFRM when the last frame as specified by
LSTFHOST is transferred. To update the host frame
address counter, HOSTSFRM must be rewritten.
The current host frame address is available by reading
HOSTCFRM.
The SCSIOFFS registers access either one or two register
pairs as controlled by SCSIMOD. SCSIOFFS determines
the starting offset address for a host transfer.
The SCSIOFFE register accesses either one or two
register pairs as controlled by SCSIMOD. SCSIOFFE
determines the ending offset address for a host transfer.
Remarks:
4
DATA BYTE
3
OFFSET11 to OFFSET8
2
Preliminary specification
1
SAA7390
0