SAA7390GP Philips Semiconductors, SAA7390GP Datasheet - Page 45

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SAA7390GP

Manufacturer Part Number
SAA7390GP
Description
High performance Compact Disc-Recordable CD-R controller
Manufacturer
Philips Semiconductors
Datasheet
Philips Semiconductors
Table 66 CSTS field descriptions
Notes
1. Normally NRQ is LOW during synchronization, header and EDC/ECC transmission.
2. RDY is set after command bit ACT is pulled LOW.
3. This is a fatal error which can be rectified only by restarting CDB2.
4. Interrupt sources are ACA = logic 1, LBT = logic 0 and HEF = logic 1.
Table 67 Block count registers: 0xF0D3 and 0xF0D4; note 1
Note
1. This is a 16-bit down counter which should be programmed with the; number of blocks - 1. As soon as the count value
Table 68 Header containing MSF address and mode: 0xF0D5, F0D6, F0D7 and F0DB
1996 Jul 02
MNEMONIC
MNEMONIC
High performance Compact
Disc-Recordable (CD-R) controller
reaches zero, LBT is cleared and ATT is pulled LOW. LBT remains active for 13.3 ms at single speed record. Note
that the counter continue to decrement. New programmed information is used at the start of the next block.
NRQ
RDY
CMDE
FIELD
CFRM
ATT
CSEC
CMIN
CBCH
SAR
ACA
CBCL
HEF
LBT
(4)
(2)
(1)
LOGIC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
1
0
1
0
1
0
1
0
1
0
1
0
1
status not ready yet during this block; SAR cleared on each new block
status already read
no request to host will be issued
requests to host will be issued
data block transmission is in progress
data transmission is ceased
access to CDB2 is denied
access to CDB2 is allowed
state of block counter has reached zero
block counter is non zero
no error has occurred during communication with the host
an error has occurred in the host communication process; note 3
interrupt to microcontroller is asserted
no pending interrupts
7
7
6
6
5
BLOCKCOUNT15 to BLOCKCOUNT8
BLOCKCOUNT7 to BLOCKCOUNT0
5
SECONDS7 to SECONDS0
45
MINUTES7 to MINUTES0
FRAME7 to FRAME0
DESCRIPTION
4
DATA BYTE
4
DATA BYTE
3
3
2
2
Preliminary specification
MODE1
1
1
SAA7390
MODE0
0
0

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