MC68020 Motorola, MC68020 Datasheet - Page 184
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MC68020
Manufacturer Part Number
MC68020
Description
(MC68020 / MC68EC020) MICROPROCESSORS USERS MANUAL
Manufacturer
Motorola
Datasheet
1.MC68020.pdf
(306 pages)
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7.4.3 Busy Primitive
The busy response primitive causes the main processor to reinitiate a coprocessor
instruction. This primitive applies to instructions in the general and conditional categories.
Figure 7-23 shows the format of the busy primitive.
The busy primitive uses the PC bit as described in 7.4.2 Coprocessor Response
Primitive General Format.
Coprocessors that can operate concurrently with the main processor but cannot buffer
write operations to their command or condition CIR use the busy primitive. A coprocessor
may execute a cpGEN instruction concurrently with an instruction in the main processor. If
the main processor attempts to initiate an instruction in the general or conditional
instruction category while the coprocessor is executing a cpGEN instruction, the
coprocessor can place the busy primitive in the response CIR. When the main processor
reads this primitive, it services pending interrupts using a preinstruction exception stack
frame (refer to Figure 7-41). The processor then restarts the general or conditional
coprocessor instruction that it had attempted to initiate earlier.
The busy primitive should only be used in response to a write to the command or condition
CIR. It should be the first primitive returned after the main processor attempts to initiate a
general or conditional category instruction. In particular, the busy primitive should not be
issued after program-visible resources have been altered by the instruction. (Program-
visible resources include coprocessor and main processor program-visible registers and
operands in memory, but not the scanPC.) The restart of an instruction after it has altered
program-visible resources causes those resources to have inconsistent values when the
processor reinitiates the instruction.
The MC68020/EC020 responds to the busy primitive differently in a special case that can
occur during a breakpoint operation (refer to Section 6 Exception Processing). This
special case occurs when a breakpoint acknowledge cycle initiates a coprocessor F-line
instruction, the coprocessor returns the busy primitive in response to the instruction
initiation, and an interrupt is pending. When these three conditions are met, the processor
reexecutes the breakpoint acknowledge cycle after completion of interrupt exception
processing. A design that uses a breakpoint to monitor the number of passes through a
loop by incrementing or decrementing a counter may not work correctly under these
conditions. This special case may cause several breakpoint acknowledge cycles to be
executed during a single pass through a loop.
MOTOROLA
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PC
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Figure 7-23. Busy Primitive Format
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M68020 USER’S MANUAL
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