MC68HC58 Motorola, MC68HC58 Datasheet - Page 43

no-image

MC68HC58

Manufacturer Part Number
MC68HC58
Description
Data Link Controller
Manufacturer
Motorola
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC58FN
Manufacturer:
MOT
Quantity:
4 130
Part Number:
MC68HC58FN
Manufacturer:
MOT
Quantity:
4 130
Part Number:
MC68HC58FN
Manufacturer:
FREESCALE
Quantity:
1 238
Part Number:
MC68HC58FNA
Manufacturer:
MEANWELL
Quantity:
100
3.2.10 Valid SOF Symbol
3.2.11 Valid BREAK Symbol
3.3 Frame Arbitration
MC68HC58
TECHNICAL DATA
TRANSMITTER A
TRANSMITTER B
If the active to passive transition beginning the next data bit or symbol occurs between
D and E, the current symbol is considered a valid SOF symbol. Refer to Figure 3-5 (4).
If the next active to passive transition does not occur between E and F, the current
symbol is considered a valid BREAK symbol. Following the BREAK symbol, an IFS
period must be observed, after which normal communication can resume on the J1850
bus. Refer to Figure 3-5 (5).
Frame arbitration on the J1850 bus is accomplished in a non-destructive manner, al-
lowing the frame with the highest priority to be transmitted. Transmitters which lose ar-
bitration simply stop transmitting and wait for an idle J1850 bus to begin transmitting
again.
If the DLC wishes to transmit onto the J1850 bus, but detects that another frame is in
progress, it must wait until the J1850 bus is idle. However, if multiple nodes begin to
transmit in the same synchronization window, frame arbitration occurs beginning with
the first bit after the SOF symbol, and continues with each bit thereafter.
The VPW symbols and J1850 bus electrical characteristics are carefully chosen so
that a logic zero (active or passive type) always dominates over a logic one (active or
passive type) simultaneously transmitted. Hence logic zeros are said to be “dominant”
and logic ones are said to be “recessive”. Whenever a node detects a dominant bit
when it transmitted a recessive bit, it loses arbitration, and immediately stops transmit-
ting. This is known as “bitwise arbitration”. Refer to Figure 3-6.
J1850 BUS
ACTIVE
PASSIVE
ACTIVE
PASSIVE
ACTIVE
PASSIVE
Figure 3-6 J1850 VPW Bitwise Arbitration
SOF
J1850 FRAME FORMAT
DATA
BIT 1
“0”
“0”
“0”
DATA
BIT 2
“1”
“1”
“1”
DATA
BIT 3
“1”
“1”
“1”
“1”
DATA
BIT 4
“0”
“0”
DATA
BIT 5
“0”
“0”
TRANSMITTER A DETECTS
AN ACTIVE STATE ON
THE BUS, AND STOPS
TRANSMITTER B WINS
ARBITRATION AND
TRANSMITTING
TRANSMITTING
CONTINUES
MOTOROLA
J1850 BIT ARB
3-9

Related parts for MC68HC58