LTC6802IG-2 LINER [Linear Technology], LTC6802IG-2 Datasheet - Page 25

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LTC6802IG-2

Manufacturer Part Number
LTC6802IG-2
Description
Multicell Addressable Battery Stack Monitor
Manufacturer
LINER [Linear Technology]
Datasheet

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applicaTions inForMaTion
Poll Interrupt Status (Level Polling)
FAULT PROTECTION
Overview
Care should always be taken when using high energy
sources such as batteries. There are numerous ways
that systems can be (mis-)configured that might affect a
Table 16. LTC6802-2 Failure Mechanism Effect Analysis
SCENARIO
Cell input open circuit (random)
Cell input open circuit (random)
Top cell input connection loss (V
Bottom cell input connection loss
(V
Disconnection of a harness between
a group of battery cells and the IC
(in a system of stacked groups)
Data link disconnection between
LTC6802-2 and the master.
Cell-pack integrity, break between
stacked units
Cell-pack integrity, break within
stacked unit
Cell-pack integrity, break within
stacked unit
)
1. Pull CSBI low
2. Send Address byte for bottom device
3. Send PLINT command byte
4. SDO output from bottom device pulled low if any device has an interrupt condition; otherwise, SDO high
5. Pull CSBI high to exit polling
6. Repeat steps 1-5 for middle device and top device
+
)
EFFECT
Power-up sequence at IC inputs
Differential input voltage overstress
Power will come from highest connected cell input
or via data port fault current
Power will come from lowest connected cell input
or via data port fault current
Loss of supply connection to the IC
Loss of serial communication (no stress to ICs).
No effect during charge or discharge
Cell input reverse overstress during discharge
Cell input positive overstress during charge
battery system during its useful lifespan. Table 16 shows
the various situations that should be considered when plan-
ning protection circuitry. The first five scenarios are to be
anticipated during production and appropriate protection
is included within the LTC6802-2 device itself.
DESIGN MITIGATION
Clamp diodes at each pin to V
alternate power path.
Zener diodes across each cell voltage input pair (within IC)
limits stress.
Clamp diodes at each pin to V
alternate power path.
Clamp diodes at each pin to V
alternate power path.
Clamp diodes at each pin to V
an alternate power path if there are other devices (which can
supply power) connected to the LTC6802-2.
The device will enter standby mode within 2 seconds of
disconnect. Discharge switches are disabled in standby mode.
Use digital isolators to isolate the LTC6802-2 serial port from
other LTC6802-2 serial ports.
Add parallel Schottky diodes across each cell for load-path
redundancy. Diode and connections must handle full operating
current of stack, will limit stress on IC
Add SCR across each cell for charge-path redundancy. SCR
and connections must handle full charging current of stack, will
limit stress on IC by selection of trigger Zener
+
+
+
+
and V
and V
and V
and V
LTC6802-2
(within IC) provide
(within IC) provide
(within IC) provide
(within IC) provide

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