LTC695-3.3 LINER [Linear Technology], LTC695-3.3 Datasheet - Page 11

• Manufacturer Part Number: LTC695-3.3
• Description: 3.3V Microprocessor Supervisory Circuits
• Manufacturer: LINER [Linear Technology]

A
3.3V
V
3.3V
IN
+
0.1 F
V
PPLICATI
2.4V
IN
0.1 F
R1
51k
R2
16k
2.4V
Figure 6. A Typical Nonvolatile CMOS RAM Application
5V
Figure 9. Monitoring Regulated DC Supply with the
LTC694-3.3/LTC695-3.3’s Power-Fail Comparator
Figure 8. Monitoring Unregulated DC Supply with the
LTC694-3.3/LTC695-3.3’s Power-Fail Comparator
+
10 F
6.5V
Figure 7. Write Protect for RAM with LTC694-3.3
10 F
V
SHDN
LT1129-3.3
OUT SENSE
V
V
IN
CC
LTC694-3.3
BATT
V
V
CC
BATT
ADJ
LTC695-3.3
GND
V
SHDN
LT1129-3.3
OUT SENSE
IN
GND
V
O
OUT
ADJ
RESET
CE OUT
V
RESET
RESET
V
CE IN
OUT
OUT
U
V
OUT
S
+
10 F
+
+
+
I FOR ATIO
U
10 F
30ns PROPAGATION DELAY
FROM DECODER
TO P
R1
27k
R2
16k
R5
5k
10 F
200k
100 F
R3
3.3V
2.7M
R3
10k
R4
R4
10k
3.3V
0.1 F
W
0.1 F
0.1 F
CS
0.1 F
TO P
TO P
PFI
PFO
V
CC
PFO
PFI
LTC694-3.3
LTC695-3.3
V
CS1
CC
V
CS2
LTC694-3.3
LTC695-3.3
CC
GND
CS
U
V
62128
RAM
GND
CC
694/5-3.3 F09
GND
62512
GND
694/5-3.3 F06
RAM
694/5-3.3 F08
694/5-3.3 F07
comparing the power failure input (PFI) with an internal
1.3V reference.
PFO goes low when the voltage at the PFI pin is less than
1.3V. Typically PFI is driven by an external voltage divider
(R1 and R2 in Figures 8 and 9) which senses either an
unregulated DC input or a regulated 3.3V output. The
voltage divider ratio can be chosen such that the voltage
at the PFI pin falls below 1.3V several milliseconds before
the 3.3V supply falls below the maximum reset voltage
threshold 3.0V. PFO is normally used to interrupt the
microprocessor to execute shutdown procedure between
PFO and RESET or RESET.
The power-fail comparator, C3, does not have hysteresis.
Hysteresis can be added however, by connecting a resis-
tor between the PFO output and the noninverting PFI input
pin as shown in Figures 8 and 9. The upper and lower trip
points in the comparator are established as follows:
When PFO output is low, R3 sinks current from the
summing junction at the PFI pin.
When PFO output is high, the series combination of R3 and
R4 source current into the PFI summing junction.
Example 1: The circuit in Figure 8 demonstrates the use of
the power-fail comparator to monitor the unregulated
power supply input. Assuming the the rate of decay of the
supply input V
a shutdown procedure is 8ms. Also the noise of V
200mV. With these assumptions in mind, we can reason-
ably set V
maximum reset voltage threshold and the dropout voltage
of the LT1129-3.3 (3V + 0.4V) and V
V =1.3V 1+
V
Assuming R4
H
L
1.3V 1
L
= 5V which is 1.6V greater than the sum of
IN
LTC694-3.3/LTC695-3.3
is 100mV/ms and the total time to execute
R2
R1
R2
R1
–
R3,V
R3
R1
(3.3V – 1.3V)R1
1.3V(R3 R4)
HYSTERESIS
HYSTERESIS
3 V
.3
= 850mV.
R3
R1
11
IN
is