LTC695-3.3 LINER [Linear Technology], LTC695-3.3 Datasheet - Page 8

• Manufacturer Part Number: LTC695-3.3
• Description: 3.3V Microprocessor Supervisory Circuits
• Manufacturer: LINER [Linear Technology]

LTC694-3.3/LTC695-3.3
A
Microprocessor Reset
The LTC694-3.3/LTC695-3.3 use a bandgap voltage refer-
ence and a precision voltage comparator C1 to monitor the
3.3V supply input on V
falls below the reset voltage threshold, the RESET output
is forced to active low state. The reset voltage threshold
accounts for a 10% variation on V
becomes active low when V
typical). On power-up, the RESET signal is held active low
for a minimum of 140ms after reset voltage threshold is
reached to allow the power supply and microprocessor to
stabilize. The reset active time is adjustable on the LTC695-
3.3. On power-down, the RESET signal remains active low
even with V
microprocessor in stable shutdown condition. Figure 1
shows the timing diagram of the RESET signal.
The precision voltage comparator, C1, typically has 40mV
of hysteresis which ensures that glitches at V
activate the RESET output. Response time is typically
10 s. To help prevent mistriggering due to transient loads,
the V
the leads trimmed as short as possible.
The LTC695-3.3 has two additional outputs: RESET and
LOW LINE. RESET is an active high output and is the
inverse of RESET. LOW LINE is the output of the precision
voltage comparator C1. When V
voltage threshold, LOW LINE goes low. LOW LINE returns
high as soon as V
8
PPLICATI
CC
pin should be bypassed with a 0.1 F capacitor with
CC
as low as 1V. This capability helps hold the
LOW LINE
CC
O
RESET
rises above the reset voltage threshold.
U
V
CC
S
CC
(see Block Diagram). When V
I FOR ATIO
U
V2
CC
CC
CC
falls below 3.0V (2.9V
t
1
, so the RESET output
falls below the reset
W
CC
Figure 1. Reset Active Time
pin do not
U
V1
CC
V2
Battery Switchover
The battery switchover circuit compares V
input, and connects V
V
comparator, C2, connects V
pumped NMOS power switch, M1. When V
50mV above V
PMOS switch, M2. C2 has typically 20mV of hysteresis to
prevent spurious switching when V
equal to V
20 s.
During normal operation, the LTC694-3.3/LTC695-3.3
use a charge-pumped NMOS power switch to achieve low
dropout and low supply current. This power switch can
deliver up to 50mA to V
resistance of 5 . The V
a capacitor of 0.1 F or greater to ensure stability. Use of
a larger bypass capacitor is advantageous for supplying
current to heavy transient loads.
When operating currents larger than 50mA are required
from V
tial) is desired, the LTC695-3.3 should be used. This
product provides BATT ON output to drive the base of an
external PNP transistor (Figure 2). If higher currents are
needed with the LTC694-3.3, a high current Schottky
diode can be connected from the V
to supply the extra current.
CC
rises to 70mV above V
V1 = RESET VOLTAGE THRESHOLD
V2 = RESET VOLTAGE THRESHOLD +
t
1
OUT
= RESET ACTIVE TIME
t
RESET THRESHOLD HYSTERESIS
1
BATT
, or a lower dropout (V
. The response time of C2 is approximately
BATT
, C2 connects V
OUT
OUT
OUT
to whichever is higher. When
from V
OUT
pin should be bypassed with
BATT
to V
CC
, the battery switchover
V1
OUT
CC
-V
CC
CC
OUT
694/5-3.3 F01
and has a typical on
CC
pin to the V
to V
through a charge-
voltage differen-
remains nearly
CC
BATT
to the V
CC
through a
falls to
OUT
BATT
pin