S29PL-J SPANSION [SPANSION], S29PL-J Datasheet - Page 9

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S29PL-J

Manufacturer Part Number
S29PL-J
Description
CMOS 3.0 Volt-only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control
Manufacturer
SPANSION [SPANSION]
Datasheet
1.
1.1
September 22, 2006 S29PL-J_00_A9
Simultaneous Read/Write Operation with Zero Latency
Page Mode Features
The Simultaneous Read/Write architecture provides simultaneous operation by dividing the memory space
into 4 banks, which can be considered to be four separate memory arrays as far as certain operations are
concerned. The device can improve overall system performance by allowing a host system to program or
erase in one bank, then immediately and simultaneously read from another bank with zero latency (with two
simultaneous operations operating at any one time). This releases the system from waiting for the completion
of a program or erase operation, greatly improving system performance.
The device can be organized in both top and bottom sector configurations. The banks are organized as
follows:
The page size is 8 words. After initial page access is accomplished, the page mode operation provides fast
read access speed of random locations within that page.
Bank
Bank
1A
1B
2A
2B
A
B
C
D
D a t a
16 Mbit (4 Kw x 8 and 32 Kw x 31)
16 Mbit (4 Kw x 8 and 32 Kw x 31)
S h e e t
48 Mbit (32 Kw x 96)
48 Mbit (32 Kw x 96)
PL127J Sectors
( A d v a n c e
16 Mbit (4 Kw x 8 and 32 Kw x 31)
16 Mbit (4 Kw x 8 and 32 Kw x 31)
48 Mbit (32 Kw x 96)
48 Mbit (32 Kw x 96)
PL129J Sectors
S29PL-J
I n f o r m a t i o n )
8 Mbit (4 Kw x 8 and 32 Kw x 15)
8 Mbit (4 Kw x 8 and 32 Kw x 15)
24 Mbit (32 Kw x 48)
24 Mbit (32 Kw x 48)
PL064J Sectors
4 Mbit (4 Kw x 8 and 32 Kw x 7)
4 Mbit (4 Kw x 8 and 32 Kw x 7)
12 Mbit (32 Kw x 24)
12 Mbit (32 Kw x 24)
PL032J Sectors
CE# Control
CE1#
CE1#
CE2#
CE2#
7

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