S29PL032J SPANSION [SPANSION], S29PL032J Datasheet - Page 27

• Manufacturer Part Number: S29PL032J
• Description: CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control
• Manufacturer: SPANSION [SPANSION]

April 7, 2005 31107A62
RESET#: Hardware Reset Pin
Output Disable Mode
The RESET# pin provides a hardware method of resetting the device to reading
array data. When the RESET# pin is driven low for at least a period of t
device immediately terminates any operation in progress, tristates all output
pins, and ignores all read/write commands for the duration of the RESET# pulse.
The device also resets the internal state machine to reading array data. The op-
eration that was interrupted should be reinitiated once the device is ready to
accept another command sequence, to ensure data integrity.
Current is reduced for the duration of the RESET# pulse. When RESET# is held
at V
at V
The RESET# pin may be tied to the system reset circuitry. A system reset would
thus also reset the Flash memory, enabling the system to read the boot-up firm-
ware from the Flash memory.
If RESET# is asserted during a program or erase operation, the RY/BY# pin re-
mains a “0” (busy) until the internal reset operation is complete, which requires
a time of t
RY/BY# to determine whether the reset operation is complete. If RESET# is as-
serted when a program or erase operation is not executing (RY/BY# pin is “1”),
the reset operation is completed within a time of t
gorithms). The system can read data t
Refer to the
for the timing diagram.
When the OE# input is at V
(except for RY/BY#) are placed in the highest Impedance state
SS
IL
±0.3 V, the device draws CMOS standby current (ICC4). If RESET# is held
but not within V
READY
"AC
(during Embedded Algorithms). The system can thus monitor
Characteristic" section tables for RESET# parameters and to 13
P R E L I M I N A R Y
S29PL127J/S29PL129J/S29PL064J/S29PL032J
SS
±0.3 V, the standby current will be greater.
IH
, output from the device is disabled. The output pins
RH
after the RESET# pin returns to V
READY
(not during Embedded Al-
RP
IH
, the
.
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