CY7C1380D CYPRESS [Cypress Semiconductor], CY7C1380D Datasheet - Page 2
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CY7C1380D
Manufacturer Part Number
CY7C1380D
Description
18-Mbit (512K x 36/1M x 18) Pipelined SRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY7C1380D.pdf
(29 pages)
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Document #: 38-05543 Rev. *A
Logic Block Diagram – CY7C1380D (512K x 36)
A0, A1, A
Logic Block Diagram – CY7C1382D (1 M x 18)
1
A0, A1, A
MODE
BW
ADSC
BW
ADSP
BWE
ADV
BW
BW
CLK
GW
MODE
CE
CE
CE
ADSC
ADSP
OE
D
ZZ
ADV
BW
BW
BWE
C
CLK
GW
CE2
CE3
CE
B
A
OE
1
2
3
ZZ
A
B
1
CONTROL
SLEEP
WRITE REGISTER
WRITE REGISTER
WRITE REGISTER
WRITE REGISTER
WRITE REGISTER
WRITE REGISTER
CONTROL
DQ
DQ
DQ
DQ
SLEEP
REGISTER
ADDRESS
DQ
DQ
BYTE
REGISTER
C ,
BYTE
BYTE
B ,
D ,
A ,
BYTE
ENABLE
DQP
DQP
DQP
DQP
REGISTER
A,
B,
ENABLE
DQP
DQP
C
B
D
A
ADDRESS
REGISTER
B
A
COUNTER AND
CLR
BURST
LOGIC
PIPELINED
PIPELINED
2
CLR
ENABLE
ENABLE
COUNTER
Q1
Q0
2
A[1:0]
BURST
LOGIC
AND
A
[1:0]
Q1
Q0
PRELIMINARY
WRITE DRIVER
WRITE DRIVER
WRITE DRIVER
WRITE DRIVER
DQ
WRITE DRIVER
DQ
DQ
WRITE DRIVER
DQ
DQ
DQ
BYTE
BYTE
BYTE
C ,
BYTE
D
B ,
A ,
,DQP
DQP
DQP
DQP
B,
A,
DQP
DQP
C
B
D
A
B
A
MEMORY
ARRAY
MEMORY
ARRAY
SENSE
AMPS
SENSE
AMPS
REGISTERS
OUTPUT
REGISTERS
OUTPUT
OUTPUT
BUFFERS
OUTPUT
BUFFERS
CY7C1380D
CY7C1382D
E
E
REGISTERS
REGISTERS
INPUT
Page 2 of 29
INPUT
DQP
DQP
DQP
DQP
D Q s
A
D
B
C
DQs
DQP
DQP
A
B