APA075-BGB ACTEL [Actel Corporation], APA075-BGB Datasheet - Page 59

• Manufacturer Part Number: APA075-BGB
• Description: ProASIC Flash Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

Table 1-48 • JTAG Switching Characteristics
Figure 1-30 • JTAG Operation Timing
Description
Output delay from TCK falling to TDI, TMS
TDO Setup time before TCK rising
TDO Hold time after TCK rising
TCK period
RCK period
Notes:
1. For DC electrical specifications of the JTAG pins (TCK, TDI, TMS, TDO, TRST), refer to
2. If RCK is being used, there is no minimum on the TCK period.
and
Table 1-22 on page 1-38
when V
TMS, TDI
DDP
TCK
TDO
= 3.3 V.
t
TCKTDI
t
t
TCK
TDOTCK
Symbol
t
t
t
t
TDOTCK
TCKTDO
v5.7
TCKTDO
TCKTDI
t
t
RCK
TCK
Table 1-21 on page 1-36
100
Min
100
–4
10
0
2
ProASIC
1,000
1,000
Max
PLUS
4
Flash Family FPGAs
when V
DDP
Unit
ns
ns
ns
ns
ns
= 2.5 V
1-53