CY7C68310 CYPRESS [Cypress Semiconductor], CY7C68310 Datasheet - Page 3

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CY7C68310

Manufacturer Part Number
CY7C68310
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet

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4.2
Document 38-08030 Rev. *H
56, 54, 52,
42, 39, 41,
43, 45, 48,
51, 53, 55,
18–20, 25
49,46, 44,
Number
30–32
37, 38
Pin
22
23
26
27
28
29
33
34
35
36
57
58
62
2
5
6
8
9
Pin Overview
DRVPWRVLD
GPIO2_nHS
GPIO[0:1],
Pin Name
LOWPWR
TEST[0:3]
nATARST
SCANEN
TMC[1:2]
nRESET
DD[0:15]
SYSIRQ
nEJECT
DMARQ
nDIOW
ATAEN
RSDM
RSDP
RPU
DM
DP
XO
XI
Direction
Pin
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
5V-tolerant input
(2.5V-tolerant)
Schmitt input
Schmitt input
Schmitt input
Schmitt input
Schmitt input
high-Z driver,
Schmitt input
Schmitt input
Schmitt input
USB Output
OSC output
5V-tolerant,
5V-tolerant,
5V-tolerant,
5V-tolerant,
5V-tolerant,
input buffer
5V-tolerant
5V-tolerant
5V-tolerant
5V-tolerant
3.3V drive,
5V tolerant
5V-tolerant
3.3V drive,
3.3V drive,
5V tolerant
3.3V drive,
OSC input
3.3V input
6-mA I
6-mA I
Pin Type
6-mA I
6-mA I
6-mA I
USB I/O
USB I/O
USB I/O
USB I/O
buffer
OL
OL
OL
OL
OL
,
,
D+ pull-up source. Power source for 1.5k pull-up resistor attached
to D+ during full-speed operation.
USB full-speed output buffer (D+). RSDP also functions as a
current sink for termination during high-speed operation.
USB high-speed I/O buffer (D+).
USB high-speed I/O buffer (D-).
USB full-speed output buffer (D-). RSDM also functions as a
current sink for termination during high-speed operation.
Active HIGH. ASIC fabrication and manufacturing test mode select.
These pins must be tied to GND during normal operation.
30-MHz crystal input.
30-MHz crystal output.
Active LOW. Media eject or remote wakeup requested. Tie to +3.3V
if functionality is not used.
Active HIGH. USB interrupt request. Tie to GND if functionality is not
used.
Configurable polarity. Device Presence Detect. This pin must not
be allowed to float if functionality is not utilized.
Active HIGH. ATA interface enable.
‘1’ = normal ATA operation
‘0’ = High-Z ATA interface pins and ATA interface logic halted
General purpose I/O pins. The GPIO pins must be tied to GND if
functionality is not utilized. If the hs_indicator config bit is set, the
GPIO2_nHS pin will reflect the operating speed of the device.
‘1’ = full-speed operation
‘0’ = high-speed operation
Active HIGH. ASIC test pin. This pin must be tied to GND during
normal operation.
Active HIGH. USB suspend indicator.
‘0’ = Chip active. VBUS power up to 100 mA granted.
‘High-Z’ = Chip suspend. VBUS system current limited to USB
suspend mode value.
Active LOW. Asynchronous chip reset.
Active LOW. ATA reset signal.
Active HIGH. ASIC test pins. These pins must be tied to GND during
normal operation.
ATA data signals.
ATA control signal.
ATA control signal.
Pin Description
CY7C68310
Page 3 of 34

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