PCF2123BS NXP [NXP Semiconductors], PCF2123BS Datasheet - Page 31

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PCF2123BS

Manufacturer Part Number
PCF2123BS
Description
SPI Real time clock/calendar
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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Product data sheet
9.12 External clock test mode
Table 39.
A test mode is available which allows for on-board testing. In this mode it is possible to set
up test conditions and control the operation of the RTC.
The test mode is entered by setting bit EXT_TEST in register Control_1. Then
pin CLKOUT becomes an input. The test mode replaces the internal clock signal with the
signal applied to pin CLKOUT. Every 64 positive edges applied to pin CLKOUT generates
an increment of one second.
The signal applied to pin CLKOUT should have a minimum pulse width of 300 ns and a
minimum period of 1000 ns. The internal clock, now sourced from CLKOUT, is divided
down to 1 Hz by a 2
known state by using bit STOP. When bit STOP is set, the prescaler is reset to 0. (STOP
must be cleared before the prescaler can operate again.)
From a stop condition, the first 1 second increment will take place after 32 positive edges
on pin CLKOUT. Thereafter, every 64 positive edges will cause a 1 second increment.
Remark: Entry into test mode is not synchronized to the internal 64 Hz clock. When
entering the test mode, no assumption as to the state of the prescaler can be made.
Frequency (Hz)
CLKOUT
32768
16384
8192
4096
2048
1024
1
Time source clock
4096
64
1
1
60
Effect of correction pulses
6
Rev. 01 — 19 November 2008
divide chain called a prescaler. The prescaler can be set into a
Effect of correction
no effect
no effect
no effect
no effect
no effect
no effect
effected
no effect
no effect
effected
effected
SPI Real time clock/calendar
PCF2123
© NXP B.V. 2008. All rights reserved.
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