PCF8523 NXP [NXP Semiconductors], PCF8523 Datasheet - Page 12

no-image

PCF8523

Manufacturer Part Number
PCF8523
Description
Real-Time Clock (RTC) and calendar
Manufacturer
NXP [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCF8523T
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
PCF8523T/1
Manufacturer:
CDE
Quantity:
12 000
Part Number:
PCF8523T/1
Manufacturer:
NXP
Quantity:
9 029
Part Number:
PCF8523T/1
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
PCF8523T/1
0
Part Number:
PCF8523T/1,118
Manufacturer:
NXP
Quantity:
3 188
Part Number:
PCF8523T/1.118
0
Part Number:
PCF8523TK/1,118
Manufacturer:
MOLEX
Quantity:
10 000
Part Number:
PCF8523TS/1
Manufacturer:
VISHAY
Quantity:
6 758
Part Number:
PCF8523TS/1
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
PCF8523TS/1
0
Part Number:
PCF8523TS/1,118
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
PCF8523
Product data sheet
8.4 Interrupt function
After reset, the following mode is entered:
Active low interrupt signals are available at pin INT1/CLKOUT and INT2. Pin
INT1/CLKOUT has both functions of INT1 and CLKOUT combined.
INT1 Interrupt output may be sourced from different places:
INT2 interrupt output is sourced only from timer B:
The control bit TAM (register Tmr_CLKOUT_ctrl) is used to configure whether the
interrupts generated from the second interrupt timer and timer A are pulsed signals or a
permanently active signal. The control bit TBM (register Tmr_CLKOUT_ctrl) is used to
configure whether the interrupt generated from timer B is a pulsed signal or a permanently
active signal. All the other interrupt sources generate a permanently active interrupt
signal, which follows the status of the corresponding flags.
32.768 kHz CLKOUT active
24 hour mode is selected
Register Offset is set logic 0
No alarms set
Timers disabled
No interrupts enabled
Battery switch-over is disabled
Battery low detection is disabled
7 pF of internal oscillator capacitor selected
Second timer
Timer A
Timer B
Alarm
Battery Switch-over
Battery Low Detection
Clock offset correction pulse
The flags SF, CTAF, CTBF, AF, and BSF can be cleared by using the interface.
WTAF is read only. A read of the register Control_2 (01h) will automatically reset
WTAF (WTAF = 0) and clear the interrupt.
The flag BLF is read only. It is cleared automatically from the battery low detection
circuit when the battery is replaced.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 30 March 2011
Real-Time Clock (RTC) and calendar
PCF8523
© NXP B.V. 2011. All rights reserved.
12 of 66

Related parts for PCF8523