PCF8523 NXP [NXP Semiconductors], PCF8523 Datasheet - Page 27

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PCF8523

Manufacturer Part Number
PCF8523
Description
Real-Time Clock (RTC) and calendar
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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NXP Semiconductors
PCF8523
Product data sheet
8.8 Register Offset
The PCF8523 incorporates an offset register (address 0Eh), which can be used to
implement several functions, like:
Table 26.
[1]
Each LSB will introduce an offset of 4.34 ppm for MODE = 0 and 4.069 ppm for
MODE = 1. The values of 4.34 ppm and 4.069 ppm are based on a nominal 32.768 kHz
clock. The offset value is coded in two’s complement giving a range of +63 LSB
to 64 LSB.
Table 27.
[1]
The correction is made by adding or subtracting clock correction pulses, thereby changing
the period of a single second.
It is possible to monitor when correction pulses are applied. To enable correction interrupt
generation, bit CIE (register Control_1) has to be set logic 1. At every correction cycle a
1
applied, a
Bit
7
6 to 0
OFFSET[6:0]
0111111
0111110
:
0000010
0000001
0000000
1111111
1111110
:
1000001
1000000
4096
Aging adjustment,
Temperature compensation,
Accuracy tuning.
Default value.
Default mode.
s pulse will be generated on pin INT1. In the case that multiple correction pulses are
Symbol
MODE
OFFSET[6:0]
1
Offset - offset register (address 0Eh) bit description
Offset values
4096
All information provided in this document is subject to legal disclaimers.
s interrupt pulse will be generated for each correction pulse applied.
Offset value in
decimal
+63
+62
:
+2
+1
0
1
2
:
63
64
Rev. 3 — 30 March 2011
[1]
Value
0
1
see
[1]
Table 27
Offset value in ppm
Every two hours
(MODE = 0)
+273.420
+269.080
:
+8.680
+4.340
0
4.340
8.680
:
273.420
277.760
Description
offset is made once every two hours
offset is made once every minute
offset value
[1]
Real-Time Clock (RTC) and calendar
Every minute
(MODE = 1)
+256.347
+252.278
:
+8.138
+4.069
0
4.069
8.138
:
256.347
260.416
[1]
PCF8523
© NXP B.V. 2011. All rights reserved.
27 of 66

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