M48T08-150PC1TR STMICROELECTRONICS [STMicroelectronics], M48T08-150PC1TR Datasheet - Page 12

• Manufacturer Part Number: M48T08-150PC1TR
• Description: CMOS 8K x 8 TIMEKEEPER SRAM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M48T08, M48T08Y, M48T18
Data Retention Mode
With valid V
ates as a conventional BYTEWIDE™ static RAM.
Should the supply voltage decay, the RAM will au-
tomatically power-fail deselect, write protecting it-
self when V
(min) window. All outputs become high imped-
ance, and all inputs are treated as “Don't care.”
Note: A power failure during a WRITE cycle may
corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's con-
tent. At voltages below V
assured the memory will be in a write protected
state, provided the V
The M48T08/18/08Y may respond to transient
noise spikes on V
window during the time the device is sampling
V
lines is recommended.
When V
switches power to the internal battery which pre-
serves data and powers the clock. The internal
button cell will maintain data in the M48T08/18/
08Y for an accumulated period of at least 10 years
when V
12/27
CC
. Therefore, decoupling of the power supply
CC
CC
is less than V
CC
drops below V
CC
applied, the M48T08/18/08Y oper-
falls within the V
CC
CC
that reach into the deselect
fall time is not less than t
PFD
SO
.
SO
(min), the user can be
, the control circuit
PFD
(max), V
PFD
F
.
Note:
SNAPHAT
As system power returns and V
V
supply is switched to external V
Write protection continues until V
(min) plus t
low as V
vertent WRITE cycles prior to system stabilization.
Normal RAM operation can resume t
exceeds V
For more information on Battery Storage Life refer
to the Application Note AN1012.
Power-fail Interrupt Pin
The M48T08/18/08Y continuously monitors V
When V
an interrupt is immediately generated. An internal
clock provides a delay of between 10µs and 40µs
before automatically deselecting the M48T08/18/
08Y. The INT pin is an open drain output and re-
quires an external pull up resistor, even if the inter-
rupt output function is not being used.
SO
, the battery is disconnected and the power
CC
CC
Requires
®
PFD
rec
falls to the power-fail detect trip point,
rises past V
top when using the SOH28 package.
(min). E1 should be kept high or E2
(max).
use
PFD
of
(min) to prevent inad-
CC
CC
M4T32-BR12SH
CC
.
reaches V
rec
rises above
after V
PFD
CC
CC
.