ADC1443D125HD IDT [Integrated Device Technology], ADC1443D125HD Datasheet - Page 32

• Manufacturer Part Number: ADC1443D125HD
• Description: Dual channel 14-bit ADC; 125, 160 or 200 Msps; JESD204B serial outputs
• Manufacturer: IDT [Integrated Device Technology]

Integrated Device Technology
ADC1443D_SER
Objective data sheet
Fig 39. SPI mode timing
SCS_N
SCLK
SDIO
R/W W1
W0
A12 A11 A10
The steps for a data transfer are:
1. Communication starts with the first rising edge on pin SCLK after a falling edge on pin
2. The first phase is the transfer of the 2-byte instruction.
3. The second phase is the transfer of the data. Its length varies, but it is always a
4. A rising edge on pin SCS_N indicates the end on data transmission.
•
Bits A12 to A0 indicate the address of the register being accessed. If it concerns a
multiple byte transfer, this address is the first register accessed. An address counter is
increased to access subsequent addresses.
SCS_N.
multiple of 8 bits. The MSB is always sent first (for instruction and data bytes).
A9
Instruction bytes
A8
A7
A6
A5
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
A4
Rev. 03 — 19 July 2012
A3
A2
A1
A0
D7
D6
D5
Register N (data)
D4
D3
D2
ADC1443D series
D1
D0
D7
D6
D5
Register N + 1 (data)
D4
D3
© IDT 2012. All rights reserved.
D2
D1
001aan743
D0
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