ADV7150LS135 AD [Analog Devices], ADV7150LS135 Datasheet - Page 25

• Manufacturer Part Number: ADV7150LS135
• Description: CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC
• Manufacturer: AD [Analog Devices]

REV. A
18.62
IOR, IOB
mA
0
IOR, IOB, IOG
19.05 0.714
Figure 31. Composite Video Waveform SYNC
mA
IOR, IOB, IOG
0
19.05 0.714
1.44
0.698
mA
0
V
0
Figure 33. Composite Video Waveform
(Pedestal = 0 IRE; R
Figure 32. Composite Video Waveform
(Pedestal = 7.5 IRE; R
V
0
26.67 1.000
0.054
8.05
mA
V
0
0
IOG
0.302
100 IRE
V
0
92.5 IRE
7.5 IRE
100 IRE
43 IRE
SET
SET
= 259 )
= 280 )
WHITE LEVEL
BLACK/ BLANK
LEVEL
BLACK LEVEL
BLANK LEVEL
WHITE LEVEL
WHITE
LEVEL
BLACK/
BLANK
LEVEL
SYNC
LEVEL
–25–
R
265
280
259
I
This output synchronization signal is used in applications where
it is necessary to synchronize multiple palette devices (ADV7150
+ ADV7151) to subpixel resolution. Each devices I
signal is in phase with its analog RGB output signal. If multiple
devices have differing output delays, the time difference can be
derived from the I
to phase shift the CLOCK inputs on one or other of the devices
inputs.
The I
of SYNC or BLANK as determined by CR21 of Command
Register 2.
PLL
SET
Synchronization Output Control
( )
PLL
signal is internally triggered by either the falling edge
Video Signal
SYNC decoded on IOG; Pedestal = 0 IRE
No SYNC decoded; Pedestal = 7.5 IRE
No SYNC decoded; Pedestal = 0 IRE
PLL
signals. This time difference is then used
ADV7150
PLL
output