ADV7150LS135 AD [Analog Devices], ADV7150LS135 Datasheet - Page 26

• Manufacturer Part Number: ADV7150LS135
• Description: CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC
• Manufacturer: AD [Analog Devices]

ADV7150
The ADV7150 is a highly integrated circuit containing both
precision analog and high speed digital circuitry. It has been
designed to minimize interference effects on the integrity of the
analog circuitry by the high speed digital circuitry. It is impera-
tive that these same design and layout techniques be applied to
the system level design such that high speed, accurate perfor-
mance is achieved. The “Recommended Analog Circuit Layout”
shows the analog interface between the device and monitor.
The layout should be optimized for lowest noise on the ADV7150
power and ground lines by shielding the digital inputs and pro-
viding good decoupling. The lead length between groups of V
and GND pins should by minimized so as to minimize inductive
ringing.
Ground Planes
The ground plane should encompass all ADV7150 ground pins,
voltage reference circuitry, power supply bypass circuitry for the
ADV7150, the analog output traces, and all the digital signal
traces leading up to the ADV7150. The ground plane is the
graphics board’s common ground plane.
Power Planes
The ADV7150 and any associated analog circuitry should have
its own power plane, referred to as the analog power plane (V
This power plane should be connected to the regular PCB
0.1 F
+5V (V
AA
)
COMP
ADV7150
GND
V
AA
BOARD DESIGN AND LAYOUT CONSIDERATIONS
V
R
IOG
IOG
IOB
IOR
IOB
IOR
I
PLL
REF
SET
ANALOG POWER PLANE
Recommended Analog Circuit Layout
POWER SUPPLY DECOUPLING (0.1 F AND 0.01 F CAPACITOR FOR EACH V
(1% METAL)
0.1 F
75
R
280
SET
1k
+5V (V
COMPLIMENTARY
75
0.01 F
APPENDIX 1
AA
OUTPUTS
AD589
(1.2V REF)
AA
).
AA
)
75
0.1 F
–26–
0.1 F
power plane (V
bead should be located within three inches of the ADV7150.
The PCB power plane should provide power to all digital logic
on the PC board, and the analog power plane should provide
power to all ADV7150 power pins and voltage reference circuitry.
Plane-to-plane noise coupling can be reduced by ensuring that
portions of the regular PCB power and ground planes do not
overlay portions of the analog power plane, unless they can be
arranged such that the plane-to-plane noise is common mode.
Supply Decoupling
For optimum performance, bypass capacitors should be installed
using the shortest leads possible, consistent with reliable opera-
tion, to reduce the lead inductance. Best performance is obtained
with 0.1 F ceramic capacitor decoupling. Each group of V
pins on the ADV7150 must have at least one 0.1 F decoupling
capacitor to GND. These capacitors should be placed as close
as possible to the device.
It is important to note that while the ADV7150 contains cir-
cuitry to reject power supply noise, this rejection decreases with
frequency. If a high frequency switching power supply is used,
the designer should pay close attention to reducing power sup-
ply noise and consider using a three terminal voltage regulator
for supplying power to the analog power plane.
CO-AXIAL CABLE
+5V (V
NOTES:
1. ALL RESISTORS ARE 1% METAL FILM
2. 0.1 F AND 0.01 F CAPACITORS ARE CERAMIC
3. ADDITIONAL DIGITALCIRCUITRY OMITTED FOR CLARITY
(75 )
CONNECTORS
0.01 F
AA
33 F
)
BNC
CC
0.1 F
) at a single point through a ferrite bead. This
(FERRITE BEAD)
75
75
75
L1
0.01 F
MONITOR
(CRT)
AA
0.1 F
GROUP)
+5V (V
CC
0.1 F
0.01 F
)
REV. A
AA