ATAM894X-TNQY ATMEL [ATMEL Corporation], ATAM894X-TNQY Datasheet - Page 84
ATAM894X-TNQY
Manufacturer Part Number
ATAM894X-TNQY
Description
8k-flash Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATAM894X-TNQY.pdf
(97 pages)
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7.1
7.1.1
84
Serial Interface
ATAM894
Serial Protocol
The EEPROM uses an MCL-like two-wire serial interface to the microcontroller for read and
write accesses to the data. It is considered to be a slave in all these applications. That means,
the controller has to be the master that initiates the data transfer and provides the clock for
transmit and receive operations.
The serial interface is controlled by the microcontroller which generates the serial clock and con-
trols the access via the SCL-line and SDA-line. SCL is used to clock the data into and out of the
device. SDA is a bi-directional line that is used to transfer data into and out of the device. The
following protocol is used for the data transfers.
Figure 7-2.
• Data states on the SDA-line changing only while SCL is low
• Changes on the SDA-line while SCL is high are interpreted as START or STOP condition
• A START condition is defined as high to low transition on the SDA-line while the SCL-line is
• A STOP condition is defined as low to high transition on the SDA-line while the SCL-line is
• Each data transfer must be initialized with a START condition and terminated with a STOP
• A receiving device generates an acknowledge (A) after the reception of each byte. This
• Before the START condition and after the STOP condition the device is in standby mode and
• The control byte that follows the START condition determines the following operation. It
high
high
condition. The START condition wakes the device from standby mode and the STOP
condition returns the device to standby mode
requires an additional clock pulse, generated by the master. If the reception was successful
the receiving master or slave device pulls down the SDA-line during that clock cycle. If an
acknowledge is not detected (N) by the interface in transmit mode, it will terminate further
data transmissions and go into receive mode. A master device must finish its read operation
by a non-acknowledge and then send a stop condition to bring the device into a known state.
the SDA line is switched as input with pull-up resistor.
consists of the 5-bit row address, 2 mode control bits and the READ/NWRITE bit that is used
to control the direction of the following transfer. A '0' defines a write access and a '1' a read
access.
Standby
SCL
SDA
MCL Protocol
Start
condition
Data
valid
change
Data
Data/
acknowledge
valid
condition
Stop
4679D–4BMCU–05/05
Standby
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