MPC8347 FREESCALE [Freescale Semiconductor, Inc], MPC8347 Datasheet - Page 13
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MPC8347
Manufacturer Part Number
MPC8347
Description
Integrated Host Processor Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MPC8347.pdf
(108 pages)
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4
This section provides the clock input DC and AC electrical characteristics for the MPC8347EA.
4.1
Table 7
4.2
The primary clock source for the MPC8347EA can be one of two inputs, CLKIN or PCI_CLK, depending
on whether the device is configured in PCI host or PCI agent mode.
(CLKIN/PCI_CLK) AC timing specifications for the MPC8347EA.
Freescale Semiconductor
Input high voltage
Input low voltage
CLKIN Input current
PCI_SYNC_IN Input current
PCI_SYNC_IN Input current
CLKIN/PCI_CLK frequency
CLKIN/PCI_CLK cycle time
CLKIN/PCI_CLK rise and fall time
CLKIN/PCI_CLK duty cycle
CLKIN/PCI_CLK jitter
Notes:
1. Caution: The system, core, USB, security, and TSEC must not exceed their respective maximum or minimum
2. Rise and fall times for CLKIN/PCI_CLK are measured at 0.4 V and 2.7 V.
3. Timing is guaranteed by design and characterization.
4. This represents the total input jitter—short term and long term—and is guaranteed by design.
5. The CLKIN/PCI_CLK driver’s closed loop jitter bandwidth should be <500 kHz at -20 dB. The bandwidth must be set
operating frequencies.
low to allow cascade-connected PLL-based devices to track CLKIN drivers with the specified jitter.
Clock Input Timing
provides the clock input (CLKIN/PCI_SYNC_IN) DC timing specifications for the MPC8347EA.
Parameter
DC Electrical Characteristics
AC Electrical Characteristics
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 3
Parameter/Condition
OVDD – 0.5 V ≤V
0.5 V ≤V
Table 6. CLKIN DC Electrical Characteristics
Table 7. CLKIN AC Timing Specifications
0V ≤V
0V ≤V
Condition
IN
IN
IN
≤ OVDD - 0.5 V
—
—
≤ 0.5 V or
≤ OVDD
t
KHK
IN
Symbol
t
f
t
KH
≤ OVDD
CLKIN
CLKIN
/t
—
, t
CLKIN
KL
Min
0.6
Symbol
—
15
40
—
V
V
I
I
I
IN
IN
IN
IH
IL
Typical
1.0
Table 7
—
—
—
—
–0.3
Min
2.7
—
—
—
+/– 150
provides the clock input
Max
2.3
66
60
—
OV
MHz
Unit
Max
DD
±10
±10
±50
0.4
ns
ns
ps
%
+0.3
Clock Input Timing
Notes
4, 5
—
1
2
3
Unit
μA
μA
μA
V
V
13