MPC8358 FREESCALE [Freescale Semiconductor, Inc], MPC8358 Datasheet - Page 15

• Manufacturer Part Number: MPC8358
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

5.2
This section describes the AC electrical specifications for the reset initialization timing requirements of
the device.
component(s).
Freescale Semiconductor
Required assertion time of HRESET or SRESET
(input) to activate reset flow
Required assertion time of PORESET with stable
clock applied to CLKIN when the device is in PCI host
mode
Required assertion time of PORESET with stable
clock applied to PCI_SYNC_IN when the device is in
PCI agent mode
HRESET/SRESET assertion (output)
HRESET negation to SRESET negation (output)
Input setup time for POR config signals
(CFG_RESET_SOURCE[0:2] and
CFG_CLKIN_DIV) with respect to negation of
PORESET when the device is in PCI host mode
Input setup time for POR config signals
(CFG_RESET_SOURCE[0:2] and
CFG_CLKIN_DIV) with respect to negation of
PORESET when the device is in PCI agent mode
Input hold time for POR config signals with respect to
negation of HRESET
Time for the device to turn off POR config signals with
respect to the assertion of HRESET
MPC8358E PowerQUICC™ II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 1
Output low voltage
Notes:
1. This table applies for pins PORESET, HRESET, SRESET and QUIESCE.
2. HRESET and SRESET are open drain pins, thus V
RESET AC Electrical Characteristics
Table 9
Characteristic
Parameter/Condition
provides the reset initialization AC timing specifications for the DDR SDRAM
Table 8. RESET Pins DC Electrical Characteristics (continued)
Table 9. RESET Initialization Timing Specifications
Symbol
V
OL
OH
Min
512
32
32
32
16
—
I
is not relevant for those pins.
4
4
0
OL
Condition
= 3.2 mA
Max
—
—
—
—
—
—
—
—
4
Min
—
t
t
t
t
t
PCI_SYNC_IN
PCI_SYNC_IN
PCI_SYNC_IN
PCI_SYNC_IN
PCI_SYNC_IN
t
t
CLKIN
CLKIN
Unit
Max
ns
ns
0.4
RESET Initialization
Unit
V
Notes
1
2
1
1
1
2
1
3
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