MPC8533E_10 FREESCALE [Freescale Semiconductor, Inc], MPC8533E_10 Datasheet - Page 90

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MPC8533E_10

Manufacturer Part Number
MPC8533E_10
Description
Integrated Processor Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Clocking
19.5
Table 62
19.6
19.6.1
Table 63
SYSCLK ratio in comparison to the memory bus clock speed.
90
Notes:
1. In 2:1 mode the CCB frequency must be operating ≤ 400 MHz.
2. In 3:1 mode any valid CCB can be used. The 3:1 mode is the default ratio for security block.
CCB to SYSCLK Ratio
shows the SEC frequency ratio.
shows the expected frequency values for the platform frequency when using a CCB clock to
Security Controller PLL Ratio
Frequency Options
10
12
16
2
3
4
5
6
8
9
Signal Name
SYSCLK to Platform Frequency Options
LWE_B
Table 63. Frequency Options of SYSCLK with Respect to Memory Bus Speeds
MPC8533E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
33.33
333
400
533
Table 62. SEC Frequency Ratio
41.66
333
375
417
500
Value (Binary)
66.66
Platform /CCB Frequency (MHz)
0
1
333
400
533
SYSCLK (MHz)
333
415
500
83
100
400
500
CCB CLK:SEC CLK
Freescale Semiconductor
2:1
3:1
111
333
445
1
2
133.33
400
533

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