MPC860DP FREESCALE [Freescale Semiconductor, Inc], MPC860DP Datasheet - Page 20

• Manufacturer Part Number: MPC860DP
• Description: Hardware Specifications
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Bus Signal Timing
Figure 2
Figure 3
20
8
9
10
in B37 and B38 are specified to enable the freeze of the UPM output signals as described in
specified in
The timing B30 refers to CS when ACS = 00 and to WE(0:3) when CSNT = 0.
The signal UPWAIT is considered asynchronous to the CLKOUT and synchronized internally. The timings specified
The AS signal is considered asynchronous to the CLKOUT. The timing B39 is specified in order to allow the behavior
is the control timing diagram.
provides the timing for the external clock.
CLKOUT
Outputs
Outputs
Inputs
Inputs
C
D
A
B
Figure
Maximum output delay specification
Minimum output hold time
Minimum input setup time specification
Minimum input hold time specification
20.
B
2.0 V
MPC860 Family Hardware Specifications, Rev. 7
2.0 V
0.8 V
A
2.0 V
0.8 V
B
0.8 V
Figure 2. Control Timing
2.0 V
0.8 V
C
2.0 V
0.8 V
D
0.8 V
A
2.0 V
0.8 V
2.0 V
0.8 V
C
2.0 V
0.8 V
2.0 V
D
2.0 V
0.8 V
Figure
Freescale Semiconductor
17.