LUPA-4000 CYPRESS [Cypress Semiconductor], LUPA-4000 Datasheet - Page 37

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LUPA-4000

Manufacturer Part Number
LUPA-4000
Description
4M Pixel CMOS Image Sensor
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
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Contact:
Cypress Semiconductor Corporation
LUPA-4000
Data Sheet
R12
Q12
P15
Q14
Q15
R13
R14
R15
P14
Q13
R16
Q16
P16
N14
N15
L16
L15
N16
M16
L14
M15
Pin
Q7
R3
M3
L2
L3
Q8
R4
R5
R6
R7
K2
Q9
Q10
R8
R9
R10
R11
Q11
info@Fillfactory.com
ref_low
linear_conv
bit_9
bit_8
bit_7
bit_6
bit_5
bit_4
bit_3
bit_2
bit_1
bit_0
clock
gndd
vddd
gnda
vdda
bit_inv
CMD_SS
analog_in
CMD_FS
Pin Name
dec_y_load
vdd
gndd
prebus1
prebus2
sh_col
pre_col
norowsel
clock_y
sync_y
eos_y_r
temp_diode_p
temp_diode_n
vpix
vmem_l
vmem_h
vres
vres_ds
Pin Type
Input
Supply
Ground
Input
Input
Input
Input
Input
Input
Input
Testpin
Testpin
Testpin
Supply
Supply
Supply
Supply
Supply
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Supply
Supply
Supply
Supply
Input
Input
Input
Input
Document #: 38-05712 Rev.**(Revision 1.2 )
3901 North First Street
correction.
inversion of output bits.
Connect to VDDA with R=50kΩ and decouple with
C=100 nF to GNDa.
Connect to VDDA with R=50kΩ and decouple with
C=100 nF to GNDa.
Digital output 1 <9> (MSB).
Digital output 1 <8>.
Digital output 1 <7>.
Digital output 1 <6>.
Digital output 1 <5>.
Digital output 1 <4>.
Digital output 1 <3>.
Digital output 1 <2>.
Digital output 1 <1>.
Digital output 1 <0> (LSB).
Analog reference input. Biasing of second stage of ADC.
Description
Analog reference input. Biasing for Y-addressing.
Connect with R=2MΩ to Vdd and decouple with
C=100nF to gndd.
Power supply digital modules.
Ground digital modules.
Digital input. Control signal to reduce readout time.
Digital input. Control signal to reduce readout time.
Digital input. Control signal of the column readout.
Digital input. Control signal of the column readout to
reduce row-blanking time.
Digital input. Control signal of the column readout.
Digital input. Clock of the Y-addressing.
Digital input. Synchronises the Y-address register.
Indicates when the end of frame is reached when
scanning in the ‘right’ direction.
Anode of temperature diode.
Cathode of temperature diode.
Power supply pixel array.
Power supply Vmem drivers.
Power supply Vmem drivers.
Power supply reset drivers.
Power supply reset drivers.
Analog reference input. Low reference voltage of ADC.
(see figure 7 for exact resistor value)
Digital input. 0= linear conversion; 1= gamma
ADC clock input.
Digital GND of ADC circuitry.
Digital supply of ADC circuitry (nominal 2.5V).
Analog GND of ADC circuitry.
Analog supply of ADC circuitry (nominal 2.5V).
Digital input. 0=no inversion of output bits; 1 =
Analog input of 1
Analog reference input. Biasing of first stage of ADC.
st
ADC.
San Jose, CA 95134
Page 37 of 49
408-943-2600

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