PIC18F2331 MICROCHIP [Microchip Technology], PIC18F2331 Datasheet - Page 30

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PIC18F2331

Manufacturer Part Number
PIC18F2331
Description
28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC18F2331/2431/4331/4431
REGISTER 2-2:
2.7.2
The PIC18F2331/2431/4331/4431 devices contain
circuitry to prevent clocking “glitches” when switching
between clock sources. A short pause in the system
clock occurs during the clock switch. The length of this
pause is between 8 and 9 clock periods of the new
clock source. This ensures that the new clock source is
stable and that its pulse width will not be less than the
shortest pulse width of the two clock sources.
Clock transitions are discussed in greater detail in
Section 3.1.2 “Entering Power-Managed Modes”.
DS39616B-page 28
OSCILLATOR TRANSITIONS
bit 7
bit 6-4
bit 3
bit 2
bit 1-0
OSCCON REGISTER
bit 7
IDLEN: Idle Enable bit
1 = Idle mode enabled; CPU core is not clocked in power-managed modes
0 = Run mode enabled; CPU core is clocked in power-managed modes
IRCF2:IRCF0: Internal Oscillator Frequency Select bits
111 = 8 MHz (8 MHz source drives clock directly)
110 = 4 MHz
101 = 2 MHz
100 = 1 MHz
011 = 500 kHz
010 = 250 kHz
001 = 125 kHz
000 = 31 kHz (INTRC source drives clock directly)
OSTS: Oscillator Start-up Time-out Status bit
1 = Oscillator start-up time-out timer has expired; primary oscillator is running
0 = Oscillator start-up time-out timer is running; primary oscillator is not ready
IOFS: INTOSC Frequency Stable bit
1 = INTOSC frequency is stable
0 = INTOSC frequency is not stable
SCS1:SCS0: System Clock Select bits
1x = Internal oscillator block (RC modes)
01 = Timer1 oscillator (Secondary modes)
00 = Primary oscillator (Sleep and PRI_IDLE modes)
Legend:
R = Readable bit
- n = Value at POR
IDLEN
R/W-0
Note 1: Depends on state of the IESO bit in Configuration Register 1H.
IRCF2
R/W-0
R/W-0
IRCF1
Preliminary
W = Writable bit
‘1’ = Bit is set
R/W-0
IRCF0
OSTS
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R
(1)
IOFS
R-0
 2003 Microchip Technology Inc.
x = Bit is unknown
R/W-0
SCS1
R/W-0
SCS0
bit 0

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