PIC18F242 MICROCHIP [Microchip Technology], PIC18F242 Datasheet - Page 147

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PIC18F242

Manufacturer Part Number
PIC18F242
Description
28/40-pin High Performance, Enhanced FLASH Microcontrollers with 10-Bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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15.4.4.5
If a user clears the CKP bit, the SCL output is forced to
‘0’. Setting the CKP bit will not assert the SCL output
low until the SCL output is already sampled low. If the
user attempts to drive SCL low, the CKP bit will not
assert the SCL line until an external I
has already asserted the SCL line. The SCL output will
remain low until the CKP bit is set, and all other
devices on the I
ensures that a write to the CKP bit will not violate the
minimum high time requirement for SCL (see
Figure 15-12).
FIGURE 15-12:
© 2006 Microchip Technology Inc.
WR
SSPCON
SDA
SCL
CKP
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Clock Synchronization and
the CKP bit
2
C bus have de-asserted SCL. This
CLOCK SYNCHRONIZATION TIMING
DX
2
C master device
Master device
asserts clock
Master device
de-asserts clock
PIC18FXX2
DS39564C-page 145
DX-1

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