PIC18F242 MICROCHIP [Microchip Technology], PIC18F242 Datasheet - Page 231

• Manufacturer Part Number: PIC18F242
• Description: 28/40-pin High Performance, Enhanced FLASH Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

CPFSGT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
© 2006 Microchip Technology Inc.
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Before Instruction
After Instruction
operation
operation
operation
Decode
PC
W
If REG
If REG
No
No
No
Q1
Q1
Q1
PC
PC
register 'f'
operation
operation
operation
Compare f with W, skip if f > W
[ label ] CPFSGT
0
a
(f)
skip if (f) > (W)
(unsigned comparison)
None
Compares the contents of data
memory location 'f' to the contents
of the W by performing an
unsigned subtraction.
If the contents of 'f' are greater than
the contents of WREG
fetched instruction is discarded and
a NOP is executed instead, making
this a two-cycle instruction. If ‘a’ is
0, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
1
1(2)
Note: 3 cycles if skip and followed
HERE
NGREATER
GREATER
Read
0110
No
No
No
Q2
Q2
Q2
=
=
=
=
f
[0,1]
W),
255
by a 2-word instruction.
Address (HERE)
?
W;
Address (GREATER)
W;
Address (NGREATER)
010a
operation
operation
operation
CPFSGT REG, 0
:
:
Process
Data
No
No
No
Q3
Q3
Q3
ffff
f [,a]
,
then the
operation
operation
operation
operation
No
No
No
No
Q4
Q4
Q4
ffff
CPFSLT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Before Instruction
After Instruction
operation
operation
operation
Decode
No
No
No
PC
W
If REG
PC
If REG
PC
Q1
Q1
Q1
register 'f'
operation
operation
operation
Compare f with W, skip if f < W
[ label ] CPFSLT
0
a
(f) – W),
skip if (f) < (W)
(unsigned comparison)
None
Compares the contents of data
memory location 'f' to the contents
of W by performing an unsigned
subtraction.
If the contents of 'f' are less than
the contents of W, then the fetched
instruction is discarded and a NOP
is executed instead, making this a
two-cycle instruction. If ‘a’ is 0, the
Access Bank will be selected. If ’a’
is 1, the BSR will not be overridden
(default).
1
1(2)
Note: 3 cycles if skip and followed
HERE
NLESS
LESS
Read
0110
No
No
No
Q2
Q2
Q2
=
=
<
=
=
f
[0,1]
PIC18FXX2
255
by a 2-word instruction.
Address (HERE)
?
W;
Address (LESS)
W;
Address (NLESS)
CPFSLT REG, 1
:
:
000a
operation
operation
operation
Process
Data
No
No
No
Q3
Q3
Q3
DS39564C-page 229
ffff
f [,a]
operation
operation
operation
operation
No
No
No
No
Q4
Q4
Q4
ffff