ADV212 AD [Analog Devices], ADV212 Datasheet - Page 23

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ADV212

Manufacturer Part Number
ADV212
Description
JPEG 2000 Video Codec
Manufacturer
AD [Analog Devices]
Datasheet

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ALTERA
0
Pin No.
69, 68,
59, 58
57, 46 to 48
112
113
114
100
101
115
103
102
53
44, 43, 29,
31, 32, 18 to
20, 22, 21, 7,
10
41
42
54
94
108
121-Ball Package
Location
G3, G2,
F4, F3
F2, E2, E3,
E4
L2
L3
L4
K1
K2
L5
K4
K3
E9
D11, D10,
C7, C9, C10,
B7, B8, B9,
B11, B10,
A7, A10
D8
D9
E10
J6
K9
Pin No.
88,73 to 75
76, 61 to 63
134
135
136
121
122
123
109
110
60
46 to 48,
34 to 36,
22 to 24,
9 to 11
58
59
57
120
119
144-Ball Package
Location
H4, G1 to G3
G4, F1 to F3
M2
M3
M4
L1
L2
L3
K1
K2
E12
D10 to D12,
C10 to C12,
B10 to B12,
A9 to A11
E10
E11
E9
K12
K11
Mnemonic
HDATA
[23:20]
HDATA
[19:16]
VDATA
[15:12]
SCOMM7
SCOMM6
SCOMM5
SCOMM4
SCOMM3
SCOMM2
SCOMM1
SCOMM0
VCLK
VDATA
[11:0]
VSYNC
VFRM
HSYNC
VRDY
FIELD
VSTRB
TCK
TRS
Rev. 0 | Page 23 of 44
Pins
Used
4
4
8
1
12
1
1
1
1
1
Type
I/O
I/O
I/O
I/O
I/O
I/O
O
I
O
I
O
I
I/O
I/O
I/O
O
I/O
I
I
I
Description
Host Expansion Bus.
Host Expansion Bus.
Video Data. Only used for raw pixel video
mode. Unused pins should be pulled down via
a 10 kΩ resistor.
Serial Communication. For internal use only.
This pin should be tied low via a 10 kΩ resistor.
Serial Communication. For internal use only.
This pin should be tied low via a 10 kΩ resistor.
Serial Communication. This pin must be used
in multiple chip mode to align the outputs of
two or more ADV212s. For details, see the
Applications section and the
Application
should be tied low via a 10 kΩ resistor.
LCODE Output in Encode Mode. When LCODE
is enabled, the output on this pin indicates on
a high transition that the last data-word for a
field has been read from the FIFO. For an 8-bit
interface, such as JDATA, LCODE is asserted for
four consecutive bytes and is enabled
by default.
Serial Communication. For internal use only.
This pin should be tied low via a 10 kΩ resistor.
Serial Communication. For internal use only.
This pin should be tied low via a 10 kΩ resistor.
Serial Communication. For internal use only.
This pin should be tied low via a 10 kΩ resistor.
Serial Communication. This pin should be tied
low via a10 kΩ resistor.
Video Data Clock. This pin must be supplied if
video data is input/output on the VDATA bus.
Video Data. Unused pins should be pulled
down via a 10 kΩ resistor.
Vertical Sync for Video Mode.
Raw Pixel Mode Framing Signal. When this pin
is asserted high, it indicates the first sample of
a tile.
Horizontal Sync for Video Mode.
Raw Pixel Mode Ready Signal.
Field Sync for Video Mode.
Raw Pixel Mode Transfer Strobe.
JTAG Clock. If not used, this pin should be
connected to ground via a pull-down resistor.
JTAG Reset. If the JTAG is used, this pin must
be toggled low to high. If JTAG is not used, this
pin must be held low.
Note. When not used, this pin
AN-796
ADV212

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