PIC18F25J11-I/PT MICROCHIP [Microchip Technology], PIC18F25J11-I/PT Datasheet - Page 173

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PIC18F25J11-I/PT

Manufacturer Part Number
PIC18F25J11-I/PT
Description
28/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
REGISTER 10-9:
REGISTER 10-10: PMADDRL: PARALLEL PORT ADDRESS REGISTER LOW BYTE –
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
R/W-0
R/W-0
In Enhanced Slave mode, PMADDRH functions as PMDOUT1H, one of the Output Data Buffer registers.
In Enhanced Slave mode, PMADDRL functions as PMDOUT1L, one of the Output Data Buffer registers.
Unimplemented: Read as ‘0’
CS1: Chip Select bit
If PMCON<7:6> = 10:
1 = Chip select is active
0 = Chip select is inactive
If PMCON<7:6> = 11 or 00:
Bit functions as ADDR<14>.
Parallel Master Port Address: High Byte<13:8> bits
Parallel Master Port Address: Low Byte<7:0> bits
R/W-0
R/W-0
CS1
PMADDRH: PARALLEL PORT ADDRESS REGISTER HIGH BYTE –
MASTER MODES ONLY (ACCESS F6Fh)
MASTER MODES ONLY (ACCESS F6Eh)
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
R/W-0
R/W-0
Parallel Master Port Address Low Byte<7:0>
R/W-0
R/W-0
Parallel Master Port Address High Byte<13:8>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F46J11 FAMILY
R/W-0
R/W-0
(1)
(1)
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
r = Reserved
r = Reserved
DS39932C-page 173
R/W-0
R/W-0
bit 0
bit 0

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