PIC18F25J11-I/PT MICROCHIP [Microchip Technology], PIC18F25J11-I/PT Datasheet - Page 372

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PIC18F25J11-I/PT

Manufacturer Part Number
PIC18F25J11-I/PT
Description
28/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC18F46J11 FAMILY
23.6
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the LVDIF bit will be set and the device will wake-
up from Sleep. Device execution will continue from the
interrupt vector address if interrupts have been globally
enabled.
TABLE 23-1:
DS39932C-page 372
HLVDCON
INTCON
PIR2
PIE2
IPR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
Name
Operation During Sleep
VDIRMAG
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIF
OSCFIE
OSCFIP
Bit 7
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
BGVST
CM1IF
CM1IE
CM1IP
Bit 6
CM2IE
CM2IP
IRVST
CM2IF
Bit 5
HLVDEN
INT0IE
Bit 4
HLVDL3
23.7
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
BCLIE
BCLIP
BCLIF
RBIE
Bit 3
Effects of a Reset
HLVDL2
TMR0IF
LVDIF
LVDIE
LVDIP
Bit 2
HLVDL1
TMR3IE
TMR3IP
TMR3IF
INT0IF
© 2009 Microchip Technology Inc.
Bit 1
HLVDL0
CCP2IF
CCP2IE
CCP2IP
RBIF
Bit 0
on page
Values
Reset
63
65
65
65
66

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