PIC18F25J11-I/PT MICROCHIP [Microchip Technology], PIC18F25J11-I/PT Datasheet - Page 224

• Manufacturer Part Number: PIC18F25J11-I/PT
• Description: 28/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F46J11 FAMILY
REGISTER 16-2:
REGISTER 16-3:
DS39932C-page 224
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2-1
bit 0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
R/W-0
CAL7
U-0
—
To enable the actual RTCC output, the RTCOE (RTCCFG<2>) bit must be set.
Unimplemented: Read as ‘0’
RTSECSEL<1:0>: RTCC Seconds Clock Output Select bits
11 = Reserved, do not use
10 = RTCC source clock is selected for the RTCC pin (pin can be INTRC or T1OSC, depending on the
01 = RTCC seconds clock is selected for the RTCC pin
00 = RTCC alarm pulse is selected for the RTCC pin
PMPTTL: PMP Module TTL Input Buffer Select bit
1 = PMP module uses TTL input buffers
0 = PMP module uses Schmitt input buffers
CAL<7:0>: RTC Drift Calibration bits
01111111 = Maximum positive adjustment; adds 508 RTC clock pulses every minute
.
.
.
00000001 = Minimum positive adjustment; adds four RTC clock pulses every minute
00000000 = No adjustment
11111111 = Minimum negative adjustment; subtracts four RTC clock pulses every minute
.
.
.
10000000 = Maximum negative adjustment; subtracts 512 RTC clock pulses every minute
U-0
R/W-0
RTCOSC (CONFIG3L<1>) setting)
—
CAL6
RTCCAL: RTCC CALIBRATION REGISTER (BANKED F3Eh)
PADCFG1: PAD CONFIGURATION REGISTER (BANKED F3Ch)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
U-0
—
R/W-0
CAL5
U-0
—
R/W-0
CAL4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
R/W-0
CAL3
RTSECSEL1
(1)
R/W-0
R/W-0
CAL2
(1)
© 2009 Microchip Technology Inc.
RTSECSEL0
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
CAL1
(1)
PMPTTL
R/W-0
R/W-0
CAL0
bit 0
bit 0