FDC37B72X_07 SMSC [SMSC Corporation], FDC37B72X_07 Datasheet - Page 12
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FDC37B72X_07
Manufacturer Part Number
FDC37B72X_07
Description
128 Pin Enhanced Super I/O Controller with ACPI Support
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.FDC37B72X_07.pdf
(238 pages)
- Current page: 12 of 238
- Download datasheet (832Kb)
Note 4: The function of P17 or P12 is selected via the P17/P12 select bit in the Ring Filter Select Register
Note 5: Buffer types per function are separated by a forward slash “/”. Multiple buffer types per function
REFERENCE DOCUMENTS
IEEE 1284 Extended Capabilities Port Protocol and ISA Standard, Rev. 1.14, July 14, 1993.
Hardware Description of the 8042, Intel 8 bit Embedded Controller Handbook.
PCI Bus Power Management Interface Specification, Rev. 1.0, Draft, March 18, 1997.
in Logical Device 8 at 0xC6. Default is P17.
are separated by a forward slash “/” and enclosed in parentheses; e.g., IRQ outputs can be open
drain or push-pull and are shown as “(O12/OD12)”.
12
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