FDC37B72X_07 SMSC [SMSC Corporation], FDC37B72X_07 Datasheet - Page 72
![no-image](/images/no-image-200.jpg)
FDC37B72X_07
Manufacturer Part Number
FDC37B72X_07
Description
128 Pin Enhanced Super I/O Controller with ACPI Support
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.FDC37B72X_07.pdf
(238 pages)
- Current page: 72 of 238
- Download datasheet (832Kb)
MODE
ONLY
BIT 3
FIFO
0
0
0
1
0
0
BIT 2
IDENTIFICATION
0
1
1
1
0
0
INTERRUPT
REGISTER
BIT 1
0
1
0
0
1
0
BIT 0
1
0
0
0
0
0
TABLE 33 - INTERRUPT CONTROL
Highest
Second
Second
Third
Fourth
PRIORITY
LEVEL
-
INTERRUPT SET AND RESET FUNCTIONS
None
Receiver Line
Status
Received Data
Available
Character
Timeout
Indication
Transmitter
Holding
Register Empty
MODEM Status Clear to Send or
INTERRUPT
72
TYPE
None
Overrun Error,
Parity Error,
Framing Error or
Break Interrupt
Receiver Data
Available
No Characters
Have Been
Removed From or
Input to the RCVR
FIFO during the
last 4 Char times
and there is at
least 1 char in it
during this time
Transmitter
Holding Register
Empty
Data Set Ready or
Ring Indicator or
Data Carrier
Detect
INTERRUPT
SOURCE
Reading the Line
Status Register
Read Receiver
Buffer or the FIFO
drops below the
trigger level.
Reading the
Receiver Buffer
Register
Reading the IIR
Register (if Source
of Interrupt) or
Writing the
Transmitter
Holding Register
Reading the
MODEM Status
Register
INTERRUPT
CONTROL
RESET
-
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