FDC37B72X_07 SMSC [SMSC Corporation], FDC37B72X_07 Datasheet - Page 156
![no-image](/images/no-image-200.jpg)
FDC37B72X_07
Manufacturer Part Number
FDC37B72X_07
Description
128 Pin Enhanced Super I/O Controller with ACPI Support
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.FDC37B72X_07.pdf
(238 pages)
- Current page: 156 of 238
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SMI/PME/SCI Logic
The logic for the SMI, PME and SCI signals is shown in the figures that follow.
Mux Control
on IRQx
on Serial
nSCI
nPME
Register
nSCI
Bits[6:5]
IRQx
of IRQ
pin
pin
Bit[6]
MUX
WAK_STS
0 0
0 1
1 0
Bit[5]
nPME
nSCI
IRQ9
Bit[2] of IRQ Mux
Control Register
nPowerOn
WAK_CTRL
PME_STS
PME_EN
SCI_EN
FIGURE 7 - PME/SCI LOGIC
GPE_EN
Register
GPE_EN.0
SCI_EN1
GPE_STS.0
GPE_STS
Register
SCI_STS1
156
PME_EN1 Register
PME_EN2 Register
PME_EN
Registers
EN_RI2
EN_RI1
EN_KBD
EN_MOUSE
EN_RING
EN_DEVINT
PWRBTN_EN
EN_GP10
EN_GP11
EN_GP12
EN_GP13
EN_GP14
EN_GP15
EN_GP16
EN_GP17
Key to Symbols
Enable bit
Sticky Status bit: Cleared by software
writing a ‘1’ to its bit location
PM1_BLK
PME_STS1 Register
PME_STS2 Register
PME_STS
Registers
RI2
RI1
KBD
MOUSE
RING
DEV_INT
GP16
GP10
GP11
GP12
GP13
GP14
GP15
GP17
PWRBTN_STS
SMI/PME
Interrupt
Device
Block
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