DZPD6722VCCE INTEL [Intel Corporation], DZPD6722VCCE Datasheet - Page 118

• Manufacturer Part Number: DZPD6722VCCE
• Description: ISA-to-PC-Card (PCMCIA) Controllers
• Manufacturer: INTEL [Intel Corporation]

PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
118
1. The Setup time is determined by the value programmed into the Setup Timing register, index 3Ah/3Dh. Using the Timer Set
2. The Command time is determined by the value programmed into the Command Timing register, index 3Bh/3Eh. Using the
3. The Recovery time is determined by the value programmed into the Recovery Timing register, index 3Ch/3Fh. Using the
4. Based on an internal clock period of 40 ns (25 MHz).
Symbol
0 default value of 01h, the setup time would be 70 ns. S = (N
page
Timer Set 0 default value of 06h, the Command time would be 270 ns. C = (N
Timer Set 0 default value of 03h, the hold (Recovery) time would be 150 ns. R = (N
Table 37. DMA Write Cycle Timing (PD6722 only)
t
t
t
t
t
t
t
t
t
t
t
t
10
11
12
1
2
3
4
5
6
7
8
9
109.
DRQ (IRQ10) and DACK* (IRQ9) active to DMA cycle begin
-CE[2:1], -REG, -IOWR, -WE, and Write Data setup to -IORD
active
Command: -IORD pulse width
Recovery: -IORD inactive to end of cycle
-WAIT active from -IORD active
-WAIT inactive to -IORD inactive
System TC (-VPP_VALID high) to -IORD
-IORD to begin of card TC (-OE)
End of card TC (-OE) to -IORD inactive
Data valid from -WAIT inactive
Data setup before -OE inactive
Data hold after -OE inactive
1
Parameter
2
4
4
3
pres
N
val
+ 1), see
(S
(C
(R
pres
(2 Tcp) +10
Tcp + 10
“PC Card Bus Timing Calculations” on
2 Tcp
Tcp) – 10
Tcp) – 10
Tcp) – 10
MIN
40
25
25
pres
40
0
N
val
+ 1), see page 109.
N
val
+ 1), see page 109.
(C – 2)Tcp – 10
MAX
50
50
Datasheet
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns