DZPD6722VCCE INTEL [Intel Corporation], DZPD6722VCCE Datasheet - Page 61
DZPD6722VCCE
Manufacturer Part Number
DZPD6722VCCE
Description
ISA-to-PC-Card (PCMCIA) Controllers
Manufacturer
INTEL [Intel Corporation]
Datasheet
1.DZPD6722VCCE.pdf
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8.5
Datasheet
Register Name: System I/O Map 0–1 End Address High
Index: 0Bh, 0Fh
Bit 7
Bits 7:0 — End Address 7:0
This register contains the least-significant byte of the address that specifies the termination of the I/
O space within the corresponding I/O map. I/O accesses that are equal or below this address and
equal or above the corresponding System I/O Map Start Address will be mapped into the I/O space
of the corresponding PC Card.
The most-significant byte is located in the System I/O Map 0–1 End Address High register (see
“System I/O Map 0–1 End Address High” on page
System I/O Map 0–1 End Address High
There are two separate System I/O Map End Address High registers, each with
identical fields. These registers are located at the following indexes:
Bits 15:8 — End Address 15:8
This register contains the most-significant byte of the End Address. See the description of the End
Address field associated with bits 7:0 of the System I/O Map 0–1 End Address Low register (see
“System I/O Map 0–1 End Address Low” on page
Bit 6
Index
Ah
Eh
Index
Bh
Fh
Bit 5
System I/O Map End Address Low
System I/O Map 0 End Address Low
System I/O Map 1 End Address Low
System I/O Map End Address High
System I/O Map 0 End Address High
System I/O Map 1 End Address High
Bit 4
End Address 15:8
RW:00000000
ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22
Bit 3
60).
61).
Bit 2
Register Compatibility Type: 365
Bit 1
Register Per: socket
Bit 0
61
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