MC68HC908GZ8 FREESCALE [Freescale Semiconductor, Inc], MC68HC908GZ8 Datasheet - Page 271

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MC68HC908GZ8

Manufacturer Part Number
MC68HC908GZ8
Description
M68HC08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Chapter 20
Development Support
20.1 Introduction
This section describes the break module, the monitor read-only memory (MON), and the monitor mode
entry methods.
20.2 Break Module (BRK)
The break module can generate a break interrupt that stops normal program flow at a defined address to
enter a background program.
Features of the break module include:
20.2.1 Functional Description
When the internal address bus matches the value written in the break address registers, the break module
issues a breakpoint signal (BKPT) to the system integration module (SIM). The SIM then causes the CPU
to load the instruction register with a software interrupt instruction (SWI). The program counter vectors to
$FFFC and $FFFD ($FEFC and $FEFD in monitor mode).
The following events can cause a break interrupt to occur:
When a CPU generated address matches the contents of the break address registers, the break interrupt
is generated. A return-from-interrupt instruction (RTI) in the break routine ends the break interrupt and
returns the microcontroller unit (MCU) to normal operation.
Figure 20-1
Figure 20-2
Freescale Semiconductor
Accessible input/output (I/O) registers during the break Interrupt
Central processor unit (CPU) generated break interrupts
Software-generated break interrupts
Computer operating properly (COP) disabling during break interrupts
A CPU generated address (the address in the program counter) matches the contents of the break
address registers.
Software writes a logic 1 to the BRKA bit in the break status and control register.
shows the structure of the break module.
provides a summary of the I/O registers.
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
271

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