MC68HC908LJ12CPB FREESCALE [Freescale Semiconductor, Inc], MC68HC908LJ12CPB Datasheet - Page 307

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MC68HC908LJ12CPB

Manufacturer Part Number
MC68HC908LJ12CPB
Description
8-bit microcontroller units
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Analog-to-Digital Converter (ADC)
15.5 Interrupts
15.6 Low-Power Modes
15.6.1 Wait Mode
15.6.2 Stop Mode
15.7 I/O Signals
Technical Data
308
When the AIEN bit is set, the ADC module is capable of generating a
CPU interrupt after each ADC conversion. A CPU interrupt is generated
if the COCO bit is at logic 0. The COCO bit is not used as a conversion
complete flag when interrupts are enabled. The interrupt vector is
defined in
The STOP and WAIT instructions put the MCU in low power-
consumption standby modes.
The ADC continues normal operation in wait mode. Any enabled CPU
interrupt request from the ADC can bring the MCU out of wait mode. If
the ADC is not required to bring the MCU out of wait mode, power down
the ADC by setting the ADCH[4:0] bits to logic 1’s before executing the
WAIT instruction.
The ADC module is inactive after the execution of a STOP instruction.
Any pending conversion is aborted. ADC conversions resume when the
MCU exits stop mode. Allow one conversion cycle to stabilize the analog
circuitry before attempting a new ADC conversion after exiting stop
mode.
The ADC module has nine channels, six channels are shared with port A
and port C I/O pins; two channels are the ADC voltage reference inputs,
V
voltage.
REFH
and V
Analog-to-Digital Converter (ADC)
Table 2-1 . Vector
REFL
; and one channel is the 1.2V bandgap reference
Addresses.
MC68HC908LJ12
Freescale Semiconductor
Rev. 2.1

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