MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 191
MC68HC908QY2
Manufacturer Part Number
MC68HC908QY2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908QY2.pdf
(230 pages)
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15.4 I/O Signals
15.4.1 BUSCLKX4
15.4.2 COPCTL Write
15.4.3 Power-On Reset
MOTOROLA
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
NOTE:
NOTE:
Service the COP immediately after reset and before entering or after
exiting stop mode to guarantee the maximum time before the first COP
counter overflow.
A COP reset pulls the RST pin low for 32 BUSCLKX4 cycles and sets
the COP bit in the reset status register (RSR). See
Status
Place COP clearing instructions in the main program and not in an
interrupt subroutine. Such an interrupt subroutine could keep the COP
from generating a reset even while the main program is not working
properly.
The following paragraphs describe the signals shown in
BUSCLKX4 is the oscillator output signal. BUSCLKX4 frequency is
equal to the crystal frequency or the RC-oscillator frequency.
Writing any value to the COP control register (COPCTL) (see
Control
SIM counter. Reading the COP control register returns the low byte of
the reset vector.
The power-on reset (POR) circuit in the SIM clears the SIM counter
4096
BUSCLKX4 cycles after power up.
Register.
Computer Operating Properly (COP)
Register) clears the COP counter and clears bits 12–5 of the
Computer Operating Properly (COP)
7.9.1 SIM Reset
Figure
15.5 COP
I/O Signals
15-1.
191
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