AT89C51CC03CA-7CTUM ATMEL [ATMEL Corporation], AT89C51CC03CA-7CTUM Datasheet - Page 132
AT89C51CC03CA-7CTUM
Manufacturer Part Number
AT89C51CC03CA-7CTUM
Description
Enhanced 8-bit MCU with CAN Controller and Flash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT89C51CC03CA-7CTUM.pdf
(197 pages)
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Functional Description
Figure 58. SPI Module Block Diagram
Operating Modes
132
SPSCR
SPCON
AT89C51CC03
SPIF
SPR2
SPEN
-
OVR
SSDIS
SPI
Control
MODF
MSTR
Figure 58 shows a detailed structure of the SPI Module.
The Serial Peripheral Interface can be configured in one of the two modes: Master mode
or Slave mode. The configuration and initialization of the SPI Module is made through
two registers:
•
•
Once the SPI is configured, the data exchange is made using:
•
During an SPI transmission, data is simultaneously transmitted (shifted out serially) and
received (shifted in serially). A serial clock line (SCK) synchronizes shifting and sam-
pling on the two serial data lines (MOSI and MISO). A Slave Select line (SS) allows
individual selection of a Slave SPI device; Slave devices that are not selected do not
interfere with SPI bus activities.
Internal Bus
The Serial Peripheral Control register (SPCON)
The Serial Peripheral Status and Control Register (SPSCR)
The Serial Peripheral DATa register (SPDAT)
SPTE
CPOL CPHA
UARTM SPTEIE MODFIE
SPR1
SPR0
SPDAT
Transmit Data Register
Receive Data Register
PERIPH
FCLK
7
Clock
Logic
Shift Register
6
5
4
3
SPI Interrupt
Request
2
1
0
M
S
Pin
Control
Logic
4182K–CAN–05/06
8-bit bus
1-bit signal
MOSI
MISO
SCK
SS
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