AT89C51CC03CA-7CTUM ATMEL [ATMEL Corporation], AT89C51CC03CA-7CTUM Datasheet - Page 62
AT89C51CC03CA-7CTUM
Manufacturer Part Number
AT89C51CC03CA-7CTUM
Description
Enhanced 8-bit MCU with CAN Controller and Flash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT89C51CC03CA-7CTUM.pdf
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Hardware Security Byte
62
AT89C51CC03
Table 24. Hardware Security Byte
After erasing the chip in parallel mode, the default value is : FFh
The erasing in ISP mode (from bootloader) does not modify this byte.
Notes:
Number
X2B
Bit
5-3
2-0
7
7
6
1. Only the 4 MSB bits can be accessed by software.
2. The 4 LSB bits can only be accessed by parallel mode.
Mnemonic Description
BLJB
LB2:0
BLJB
X2B
Bit
6
-
X2 Bit
Set this bit to start in standard mode
Clear this bit to start in X2 mode.
Boot Loader JumpBit
- 1: To start the user’s application on next RESET (@0000h) located in FM0,
- 0: To start the boot loader(@F800h) located in FM1.
Reserved
The value read from these bits are indeterminate.
Lock Bits
5
-
4
-
3
-
LB2
2
4182K–CAN–05/06
LB1
1
LB0
0
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