AT89C51CC03CA-7CTUM ATMEL [ATMEL Corporation], AT89C51CC03CA-7CTUM Datasheet - Page 60
AT89C51CC03CA-7CTUM
Manufacturer Part Number
AT89C51CC03CA-7CTUM
Description
Enhanced 8-bit MCU with CAN Controller and Flash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT89C51CC03CA-7CTUM.pdf
(197 pages)
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Hardware Boot Process
60
AT89C51CC03
Boot Loader Jump Bit (BLJB):
- This bit indicates if on RESET the user wants to jump to this application at address
@0000h on FM0 or execute the boot loader at address @F800h on FM1.
- BLJB = 0 on parts delivered with bootloader programmed.
- To read or modify this bit, the APIs are used.
Boot Vector Address (SBV):
- This byte contains the MSB of the user boot loader address in FM0.
- The default value of SBV is FCh (no user boot loader in FM0).
- To read or modify this byte, the APIs are used.
Extra Byte (EB) and Boot Status Byte (BSB):
- These Bytes are reserved for customer use.
- To read or modify these Bytes, the APIs are used.
At the falling edge of RESET, the bit ENBOOT in AUXR1 register is initialized with the
value of Boot Loader Jump Bit (BLJB).
Further at the falling edge of RESET if the following conditions (called Hardware condi-
tion) are detected:
•
•
•
The Hardware condition makes the bootloader to be executed, whatever BLJB value is.
If no hardware condition is detected, the FCON register is initialized with the value F0h.
Check of the BLJB value.
•
•
Note:
PSEN low,
EA high,
ALE high (or not connected).
–
If bit BLJB = 1:
User application in FM0 will be started at @0000h (standard reset).
If bit BLJB = 0:
Boot loader will be started at @F800h in FM1.
After Hardware Condition the FCON register is initialized with the value 00h
and the PC is initialized with F800h (FM1).
1. As PSEN is an output port in normal operating mode (running user applications or
2. To ensure correct microcontroller startup, the PSEN pin should not be tied to ground
bootloader applications) after reset it is recommended to release PSEN after the fall-
ing edge of Reset is signaled.
The hardware conditions are sampled at reset signal Falling Edge, thus they can be
released at any time when reset input is low.
during power-on.
4182K–CAN–05/06
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