STA014B STMICROELECTRONICS [STMicroelectronics], STA014B Datasheet - Page 22

• Manufacturer Part Number: STA014B
• Description: MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM AND SRS WOWO POSTPROCESSING CAPABILITY
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STA014-STA014B-STA014T
DRB
Address: 0x49 (73)
Type: R/W
Software Reset: 0xFF
Hardware Reset: 0xFF
DRB register is used to re-direct the Right Chan-
nel on the Left, or to mix both the Channels.
CHIP_MODE
Address: 0x4D (77)
Type: R/W
Hardware Reset: 0x00
Using this register it’s possible to select which op-
eration will be performed by the DSP.
Possible values are:
0x00 - MP3 decoding
0x01 - Reserved
0x02 - ADPCM Encoder
0x03 - ADPCM Decoder
0x04 - BYPASS mode
The DSP will check for the value of this register
right after the RUN command has been issued
(refer to RUN register). After that no more checks
will be performed: therefore a SOFT_RESET
must be generated in order to change the device
mode.
CRCR
Address: 0x4E (78)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
The CRC register is used to enable/disable the
CRC check. If CRC_EN bit is cleared, the CRC
value encoded in the bitstream is checked
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MSB
DRB7
b7
X
MSB
b7
0
0
0
0
:
b6
X
DRB6
b6
0
0
0
1
:
b5
X
b4
X
DRB5
b5
0
0
0
1
:
b3
X
DRB4
b4
0
0
0
0
b2
:
X
b1
X
DRB3
b3
0
0
0
0
:
CRCEN
LSB
b0
DRB2
b2
0
0
0
0
:
Default value is 0x00, corresponding at the maxi-
mum attenuation in the re-direction channel.
against the hardware one. If a discrepance oc-
curs, the current frame is skipped and the de-
coder is muted. The ERROR_CODE register is
affected with the value 0x01.
If CRC_EN bit is set, the result of the CRC check
is ignored, but the ERROR_CODE register is
nevertheless affected with the value 0x01 if a dis-
crepance has occurred.
MFSDF_441
Address: 0x50 (80)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
This register contains the value for the PLL X
driver for the 44.1KHz reference frequency.
The VCO output frequency, when decoding
44.1KHz bitstream, is divided by (MFSDF_441 +1)
PLLFRAC_441_L
Address: 0x51 (81)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
MSB
MSB
PF7
DRB1
b7
b7
X
b1
0
0
1
0
:
PF6
b6
b6
X
DRB0
LSB
b0
0
1
0
0
:
PF5
b5
b5
X
PF4
M4
b4
b4
OUTPUT ATTENUATION
NO ATTENUATION
PF3
M3
b3
b3
Description
-96dB
-1dB
-2dB
PF2
M2
b2
b2
:
PF1
M1
b1
b1
LSB
LSB
PF0
M0
b0
b0