STA014B STMICROELECTRONICS [STMicroelectronics], STA014B Datasheet - Page 23

• Manufacturer Part Number: STA014B
• Description: MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM AND SRS WOWO POSTPROCESSING CAPABILITY
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ADPCM_DATA_READY
Address: 0x52 (82)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
ADR: Adpcm Data Ready
This bit signal ADPCM encoded data are ready to
be retrieved.
PLLFRAC_441_H
Address: 0x52 (82)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
The registers are considered logically concate-
nated and contain the fractional values for the
PLL, for 44.1KHz reference frequency.
(see also PLLFRAC_L and PLLFRAC_H regis-
ters)
PF15 PF14 PF13 PF12 PF11 PF10
MSB
MSB
b7
b7
X
b6
b6
X
b5
b5
X
b4
b4
X
b3
b3
X
b2
b2
X
PF9
b1
b1
X
ADR
LSB
LSB
PF8
b0
b0
ADPCM_SAMPLE_FREQ
Address: 0x53 (83)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
ADPCM_SF: Adpcm Sample Frequency
PCMDIVIDER
Address: 0x54 (84)
Type: RW
Software Reset: 0x01
Hardware Reset: 0x01
PCMDIVIDER is used to set the frequency ratio
between the OCLK (Oversampling Clock for
DACs), and the SCKT (Serial Audio Transmitter
Clock).
The relation is the following:
MSB
PD7
b7
X
7
b6
PD6
X
6
0x0A
0x0E
0x02
b5
SCKT_freq
X
PD5
5
STA014-STA014B-STA014T
b4
PD4
4
2 1
b3
OCLK_freq
PD3
3
ADPCM_SF
PCM_DIV
b2
PD2
2
16KHz
32KHz
8KHz
b1
PD1
1
LSB
b0
PD0
23/45
0