STA014B STMICROELECTRONICS [STMicroelectronics], STA014B Datasheet - Page 9

• Manufacturer Part Number: STA014B
• Description: MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM AND SRS WOWO POSTPROCESSING CAPABILITY
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

In this mode the fractional part of the PLL is dis-
abled and the audio clocks are generated at
nominal rates. Fig. 6 describes the default
DATA_REQ
STA014 it is possible to invert the polarity of the
DATA_REQ line (register REQ_POL).
Figure 6. DATA_REQ control line
2.4 - STA014 Decoding States
There are three different decoder states: Idle,
Init, and Decode. Commands to change the de-
coding states are described in the STA014 I
registers description.
Idle Mode
In this mode (entered after a S/W or H/W reset)
the decoder is waiting for the RUN command.
This mode should be used to initialize the con-
Figure 7. MPEG Decoder Interfaces.
SOURCE STOPS TRANSMITTING DATA
DATA_REQ
SOURCE
DATA
signal
D98AU912
SOURCE SEND DATA TO STA015
behaviour.
DATA_REQ
BIT_EN
SCKR
SDI
SOURCE STOPS TRANSMITTING DATA
Programming
XTI
D00AU1144
SERIAL AUDIO INTERFACE
XTO
PLL
RX
DECODER
2
FILT
C
MPEG
SCL
figuration registers of the device. The DAC con-
nected to STA014 can be initialized during this
mode (set MUTE to 1).
Init Mode
"PLAY" and "MUTE" changes are ignored in this
mode. The internal state of the decoder will be
updated only when the decoder changes from the
state "init" to the state "decode". The "init" phase
ends when the first decoded samples are at the
output stage of the device.
Decode Mode
This mode is completely described by the follow-
ing table:
PLAY
PLAY
IIC
IIC
TX
0
0
1
1
P
X
X
SDA
MUTE
0
1
0
1
MUTE
STA014-STA014B-STA014T
0
1
Not Running
Clock State
Running
Running
Running
SDO
SCKT
LRCKT
Not Running
Clock State
Running
OCLK
Decoded
Samples
Output
DAC
PCM
0
0
0
PCM Output
Decoding
0
0
Yes
Yes
No
No
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